Eren Kursun
According to our database1,
Eren Kursun
authored at least 38 papers
between 2002 and 2021.
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Bibliography
2021
Label Augmentation via Time-based Knowledge Distillation for Financial Anomaly Detection.
CoRR, 2021
2017
IEEE Trans. Very Large Scale Integr. Syst., 2017
Compact and voltage-scalable sensor for accurate thermal sensing in dynamic thermal management.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Hotspot monitoring and Temperature Estimation with miniature on-chip temperature sensors.
Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017
Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017
2016
Proceedings of the 34th IEEE International Conference on Computer Design, 2016
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016
2014
Proceedings of the 20th IEEE International Symposium on High Performance Computer Architecture, 2014
2013
Through Silicon Via Aware Design Planning for Thermally Efficient 3-D Integrated Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
Exploring the vulnerability of CMPs to soft errors with 3D stacked nonvolatile memory.
ACM J. Emerg. Technol. Comput. Syst., 2013
Proceedings of the Design, Automation and Test in Europe, 2013
2012
ACM Trans. Design Autom. Electr. Syst., 2012
ACM J. Emerg. Technol. Comput. Syst., 2012
An information-theoretic framework for optimal temperature sensor allocation and full-chip thermal monitoring.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012
2011
Exploring the effects of on-chip thermal variation on high-performance multicore architectures.
ACM Trans. Archit. Code Optim., 2011
IEEE Micro, 2011
IEEE J. Emerg. Sel. Topics Circuits Syst., 2011
Analysis and mitigation of lateral thermal blockage effect of through-silicon-via in 3D IC designs.
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011
Exploring the vulnerability of CMPs to soft errors with 3D stacked non-volatile memory.
Proceedings of the IEEE 29th International Conference on Computer Design, 2011
Proceedings of the 48th Design Automation Conference, 2011
2010
Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010
Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010
Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques, 2010
2009
Temperature Variation Characterization and Thermal Management of Multicore Architectures.
IEEE Micro, 2009
IEEE Des. Test Comput., 2009
2008
Investigating the effects of fine-grain three-dimensional integration on microarchitecture design.
ACM J. Emerg. Technol. Comput. Syst., 2008
IBM J. Res. Dev., 2008
Proceedings of the 26th International Conference on Computer Design, 2008
2007
Fine grain 3D integration for microarchitecture design through cube packing exploration.
Proceedings of the 25th International Conference on Computer Design, 2007
2006
2005
J. Low Power Electron., 2005
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005
2004
Proceedings of the Power-Aware Computer Systems, 4th International Workshop, 2004
Proceedings of the 5th International Symposium on Quality of Electronic Design (ISQED 2004), 2004
2003
Proceedings of the 40th Design Automation Conference, 2003
2002
Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002