Erdal Oruklu

J. Signal Process. Syst., January, 2024

2022

FPGA Implementation of an Ultrasonic Flaw Detection Algorithm Based on Convolutional Neural Networks.

[BibT_eX]

[DOI]

J. Signal Process. Syst., December, 2022

Hardware Efficient Implementation of an Ultrasonic Non-Destructive Evaluation Algorithm based on DeepLearning.

[BibT_eX]

[DOI]

Proceedings of the 65th IEEE International Midwest Symposium on Circuits and Systems, 2022

2021

Program diagramming and fundamental programming patterns for a polymorphic computing dataflow processor.

[BibT_eX]

[DOI]

J. Comput. Lang., 2021

2020

Fine-Grained Instruction Placement in Polymorphic Computing Architectures.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019

From Design to Implementation - Algorithm Conversion and Transition to a Mobile Platform for an Artificial Pancreas.

[BibT_eX]

[DOI]

Proceedings of the 20th Annual SIG Conference on Information Technology Education, 2019

Investigation of Feature Inputs for Binary Classification of Ultrasonic NDT Signals using SVM and Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

Side-Channel Attack Resilient Design of a 10T SRAM Cell in 7nm FinFET Technology.

[BibT_eX]

[DOI]

Kangqi Chen

Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

2018

A Dataflow Processor as the Basis of a Tiled Polymorphic Computing Architecture with Fine-Grain Instruction Migration.

[BibT_eX]

[DOI]

IEEE Trans. Parallel Distributed Syst., 2018

Full Adder Circuit Design Using Lateral Gate-All-Around (LGAA) FETs Based on BSIM-CMG Mode.

[BibT_eX]

[DOI]

Muyu Yang

Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

2017

Hardware and Software Implementation of an Artificial Pancreas System on a Mobile Device.

[BibT_eX]

[DOI]

IJHCR, 2017

Security challenges and solutions for closed-loop artificial pancreas systems.

[BibT_eX]

[DOI]

Ali Cinar

Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

FPGA implementation of a support vector machine classifier for Ultrasonic flaw detection.

[BibT_eX]

[DOI]

Yiyue Jiang

Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

Traffic sign recognition based on the NVIDIA Jetson TX1 embedded system using convolutional neural networks.

[BibT_eX]

[DOI]

Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

2016

Communication challenges in a multi-sensor closed-loop artificial pancreas system.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE Wireless Health, 2016

Leakage reduction techniques for FinFET datapath circuits.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Conference on Electro Information Technology, 2016

Implementation of an artificial pancreas system on a mobile device.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Conference on Electro Information Technology, 2016

2015

Cyber-Physical Platform Development for Multivariable Artificial Pancreas Systems.

[BibT_eX]

[DOI]

Ali Cinar

Int. J. Handheld Comput. Res., 2015

Standard cell library characterization for FinFET transistors using BSIM-CMG models.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Electro/Information Technology, 2015

Traffic sign recognition based on prevailing bag of visual words representation on feature descriptors.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Electro/Information Technology, 2015

Sensor fusion and distributed platform development for artificial pancreas.

[BibT_eX]

[DOI]

Ali Cinar

Proceedings of the IEEE International Conference on Electro/Information Technology, 2015

Robust traffic sign recognition with feature extraction and k-NN classification methods.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Electro/Information Technology, 2015

2014

Performance evaluation of FinFET pass-transistor full adders with BSIM-CMG model.

[BibT_eX]

[DOI]

Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

Performance evaluation of multi-gate fets using the BSIM-CMG model.

[BibT_eX]

[DOI]

Neelam Patil

Proceedings of the IEEE International Conference on Electro/Information Technology, 2014

Leakage power reduction in data driven dynamic logic circuits.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Electro/Information Technology, 2014

Real-time traffic sign recognition based on Zynq FPGA and ARM SoCs.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Electro/Information Technology, 2014

2013

Improved time-frequency distribution using singular value decomposition of Choi-Williams distribution.

[BibT_eX]

[DOI]

Juan Lu

Proceedings of the IEEE International Conference on Electro-Information Technology , 2013

2012

Reduced Memory and Low Power Architectures for CORDIC-based FFT Processors.

[BibT_eX]

[DOI]

J. Signal Process. Syst., 2012

System-on-Chip Subband Decomposition Architectures for Ultrasonic Detection Applications.

[BibT_eX]

[DOI]

Joshua Weber

J. Signal Process. Syst., 2012

Security Policy Management Process within Six Sigma Framework.

[BibT_eX]

[DOI]

Vijay Anand

J. Information Security, 2012

Image and video processing platform for field programmable gate arrays using a high-level synthesis.

[BibT_eX]

[DOI]

Semih Aslan

Fernando Martinez-Vallina

IET Comput. Digit. Tech., 2012

Real-time traffic sign detection and recognition for in-car driver assistance systems.

[BibT_eX]

[DOI]

Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

A high-level synthesis and verification tool for fixed to floating point conversion.

[BibT_eX]

[DOI]

Semih Aslan

Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

3D image reconstruction and human body tracking using stereo vision and Kinect technology.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International Conference on Electro/Information Technology, 2012

Image processing design flow for virtual fitting room applications used in mobile devices.

[BibT_eX]

[DOI]

Nicolas Bessou

Anne Chadoeuf

Proceedings of the 2012 IEEE International Conference on Electro/Information Technology, 2012

Acoustic sensor array for determination of undersea acoustic signatures.

[BibT_eX]

[DOI]

Tom Chu

Proceedings of the 2012 IEEE International Conference on Electro/Information Technology, 2012

2011

FPGA-Based Configurable Frequency-Diverse Ultrasonic Target-Detection System.

[BibT_eX]

[DOI]

Joshua Weber

IEEE Trans. Ind. Electron., 2011

Direction of Arrival Estimation and Localization Using Acoustic Sensor Arrays.

[BibT_eX]

[DOI]

J. Sens. Technol., 2011

Discrete wavelet transform realisation using run-time reconfiguration of field programmable gate array (FPGA)s.

[BibT_eX]

[DOI]

IET Circuits Devices Syst., 2011

Fast Signed-Digit Multi-operand Decimal Adders.

[BibT_eX]

[DOI]

Jeff Rebacz

Circuits Syst., 2011

Polymorphic Computing: Definition, Trends, and a New Agent-Based Architecture.

[BibT_eX]

[DOI]

Circuits Syst., 2011

Trusted computing architectures for a mobile IT infrastructure.

[BibT_eX]

[DOI]

Vijay Anand

Proceedings of the ACM SIGUCCS Fall Conference on User Services 2011, 2011

2010

Constant addition with flagged binary adder architectures.

[BibT_eX]

[DOI]

Vibhuti B. Dave

Integr., 2010

Reduced memory architecture for CORDIC-based FFT.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009

Dynamically Reconfigurable Architecture Design for Ultrasonic Imaging.

[BibT_eX]

[DOI]

IEEE Trans. Instrum. Meas., 2009

Fast memory addressing scheme for radix-4 FFT implementation.

[BibT_eX]

[DOI]

Proceedings of the 2009 IEEE International Conference on Electro/Information Technology, 2009

High performance signed-digit decimal adders.

[BibT_eX]

[DOI]

Jeff Rebacz

Proceedings of the 2009 IEEE International Conference on Electro/Information Technology, 2009

Performance evaluation of SRAM cells in 22nm predictive CMOS technology.

[BibT_eX]

[DOI]

Proceedings of the 2009 IEEE International Conference on Electro/Information Technology, 2009

FPGA-based design of a high-performance and modular video processing platform.

[BibT_eX]

[DOI]

Proceedings of the 2009 IEEE International Conference on Electro/Information Technology, 2009

Realization of area efficient QR factorization using unified division, square root, and inverse square root hardware.

[BibT_eX]

[DOI]

Semih Aslan

Proceedings of the 2009 IEEE International Conference on Electro/Information Technology, 2009

2008

An Efficient FFT Engine With Reduced Addressing Logic.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2008

Fast Chirplet Transform With FPGA-Based Implementation.

[BibT_eX]

[DOI]

Yufeng Lu

IEEE Signal Process. Lett., 2008

Universal Wavelet Kernel Implementation Using Reconfigurable Hardware.

[BibT_eX]

[DOI]

Proceedings of the ReConFig'08: 2008 International Conference on Reconfigurable Computing and FPGAs, 2008

Performance analysis of flagged prefix adders with logical effort.

[BibT_eX]

[DOI]

Vibhuti B. Dave

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Fpga-based hardware/software co-design for chirplet signal decomposition.

[BibT_eX]

[DOI]

Yufeng Lu

Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008

2007

Design and Synthesis of a Carry-Free Signed-Digit Decimal Adder.

[BibT_eX]

[DOI]

John Moskal

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Design and Synthesis of a Three Input Flagged Prefix Adder.

[BibT_eX]

[DOI]

Vibhuti B. Dave

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2005

Reconfigurable architecture for ultrasonic signal compression and target detection.

[BibT_eX]

[DOI]

Guilherme Cardoso

Proceedings of the 2005 IEEE International Conference on Acoustics, 2005

2004

Multiplierless architectures for frequency-diverse target detection algorithms.

[BibT_eX]