Ercan Kalali

Orcid: 0000-0002-5467-5674

According to our database1, Ercan Kalali authored at least 34 papers between 2012 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2022
Near-Precise Parameter Approximation for Multiple Multiplications on a Single DSP Block.
IEEE Trans. Computers, 2022

2021
A Power-Efficient Parameter Quantization Technique for CNN Accelerators.
Proceedings of the 24th Euromicro Conference on Digital System Design, 2021


2020
An Approximate HEVC Intra Angular Prediction Hardware.
IEEE Access, 2020

An Approximate Versatile Video Coding Fractional Interpolation Hardware.
Proceedings of the 2020 IEEE International Conference on Consumer Electronics (ICCE), 2020

A Novel Approximate Constant Multiplier and HEVC Discrete Cosine Transform Case Study.
Proceedings of the 10th IEEE International Conference on Consumer Electronics, 2020

2019
Novel Approximate Absolute Difference Hardware.
Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

An Efficient FPGA Implementation of Versatile Video Coding Intra Prediction.
Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

2018
Approximate HEVC Fractional Interpolation Filters and Their Hardware Implementations.
IEEE Trans. Consumer Electron., 2018

A low energy intra prediction hardware for high efficiency video coding.
J. Real Time Image Process., 2018

An HEVC fractional interpolation hardware using memory based constant multiplication.
Proceedings of the IEEE International Conference on Consumer Electronics, 2018

An efficient FPGA implementation of HEVC intra prediction.
Proceedings of the IEEE International Conference on Consumer Electronics, 2018

Efficient Multiple Constant Multiplication Using DSP Blocks in FPGA.
Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

A Reconfigurable Fractional Interpolation Hardware for VVC Motion Compensation.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018

A Low Power Versatile Video Coding (VVC) Fractional Interpolation Hardware.
Proceedings of the 2018 Conference on Design and Architectures for Signal and Image Processing, 2018

2017
High performance 2D transform hardware for future video coding.
IEEE Trans. Consumer Electron., 2017

Low complexity 2D adaptive image processing algorithm and its hardware implementation.
IEEE Trans. Consumer Electron., 2017

Reconfigurable intra prediction hardware for future video coding.
IEEE Trans. Consumer Electron., 2017

A computation and energy reduction technique for HEVC intra prediction.
IEEE Trans. Consumer Electron., 2017

An FPGA implementation of future video coding 2D transform.
Proceedings of the 7th IEEE International Conference on Consumer Electronics - Berlin, 2017

Pixel correlation based computation and energy reduction techniques for HEVC fractional interpolation.
Proceedings of the 7th IEEE International Conference on Consumer Electronics - Berlin, 2017

2016
A computation and energy reduction technique for HEVC Discrete Cosine Transform.
IEEE Trans. Consumer Electron., 2016

Low complexity HEVC sub-pixel motion estimation technique and its hardware implementation.
Proceedings of the IEEE 6th International Conference on Consumer Electronics - Berlin, 2016

FPGA implementation of HEVC intra prediction using high-level synthesis.
Proceedings of the IEEE 6th International Conference on Consumer Electronics - Berlin, 2016

FPGA implementations of HEVC sub-pixel interpolation using high-level synthesis.
Proceedings of the 2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era, 2016

2015
A low energy 2D adaptive median filter hardware.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

FPGA implementations of HEVC Inverse DCT using high-level synthesis.
Proceedings of the 2015 Conference on Design and Architectures for Signal and Image Processing, 2015

2014
A computation and energy reduction technique for HEVC intra mode decision.
IEEE Trans. Consumer Electron., 2014

A low energy HEVC inverse transform hardware.
IEEE Trans. Consumer Electron., 2014

A low energy HEVC sub-pixel interpolation hardware.
Proceedings of the 2014 IEEE International Conference on Image Processing, 2014

2013
A low energy HEVC Inverse DCT hardware.
Proceedings of the IEEE Third International Conference on Consumer Electronics, 2013

A Reconfigurable HEVC sub-pixel interpolation hardware.
Proceedings of the IEEE Third International Conference on Consumer Electronics, 2013

2012
A high performance and low energy intra prediction hardware for High Efficiency Video Coding.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

A high performance and low energy intra prediction hardware for HEVC video decoding.
Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, 2012


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