Eojin Lee
Orcid: 0000-0003-2739-2924
According to our database1,
Eojin Lee
authored at least 26 papers
between 2017 and 2024.
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Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2024
IEEE Trans. Computers, October, 2024
IEEE Comput. Archit. Lett., 2024
Proceedings of the 38th ACM International Conference on Supercomputing, 2024
IDT: Intelligent Data Placement for Multi-tiered Main Memory with Reinforcement Learning.
Proceedings of the 33rd International Symposium on High-Performance Parallel and Distributed Computing, 2024
2023
MaPHeA: A Framework for Lightweight Memory Hierarchy-aware Profile-guided Heap Allocation.
ACM Trans. Embed. Comput. Syst., 2023
IEEE Comput. Archit. Lett., 2023
Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023
2022
GraNDe: Near-Data Processing Architecture With Adaptive Matrix Mapping for Graph Convolutional Networks.
IEEE Comput. Archit. Lett., 2022
Proceedings of the FPGA '22: The 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Virtual Event, USA, 27 February 2022, 2022
2021
A Deep Learning Model Using Satellite Ocean Color and Hydrodynamic Model to Estimate Chlorophyll-a Concentration.
Remote. Sens., 2021
Accelerating Fully Homomorphic Encryption Through Architecture-Centric Analysis and Optimization.
IEEE Access, 2021
TRiM: Enhancing Processor-Memory Interfaces with Scalable Tensor Reduction in Memory.
Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021
MaPHeA: a lightweight memory hierarchy-aware profile-guided heap allocation framework.
Proceedings of the LCTES '21: 22nd ACM SIGPLAN/SIGBED International Conference on Languages, 2021
Accelerating Fully Homomorphic Encryption Through Microarchitecture-Aware Analysis and Optimization.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2021
Hardware Architecture and Software Stack for PIM Based on Commercial DRAM Technology : Industrial Product.
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021
2020
MViD: Sparse Matrix-Vector Multiplication in Mobile DRAM for Accelerating Recurrent Neural Networks.
IEEE Trans. Computers, 2020
HEAAN Demystified: Accelerating Fully Homomorphic Encryption Through Architecture-centric Analysis and Optimization.
CoRR, 2020
CAT-TWO: Counter-Based Adaptive Tree, Time Window Optimized for DRAM Row-Hammer Prevention.
IEEE Access, 2020
Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020
2019
Proceedings of the 46th International Symposium on Computer Architecture, 2019
2018
IEEE Comput. Archit. Lett., 2018
2017
Work as a team or individual: Characterizing the system-level impacts of main memory partitioning.
Proceedings of the 2017 IEEE International Symposium on Workload Characterization, 2017
SOUP-N-SALAD: Allocation-Oblivious Access Latency Reduction with Asymmetric DRAM Microarchitectures.
Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017