Enver Cavus
Orcid: 0000-0002-7203-9700
According to our database1,
Enver Cavus
authored at least 23 papers
between 2001 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
Low Complexity Lookup Table Aided Soft Output Semidefinite Relaxation Based Faster-than-Nyquist Signaling Detector.
Proceedings of the IEEE International Conference on Communications, 2024
2023
IEEE Commun. Lett., January, 2023
2022
2021
Proceedings of the 32nd IEEE Annual International Symposium on Personal, 2021
Proceedings of the International Conference on INnovations in Intelligent SysTems and Applications, 2021
2020
Analysis and FPGA Implementation of Zero-Forcing Receive Beamforming with Signal Space Diversity under Different Interleaving Techniques.
J. Circuits Syst. Comput., 2020
Low-Complexity MIMO MMSE Receiver with Performance Enhancement via Coordinate Interleaving.
J. Circuits Syst. Comput., 2020
A Novel Current-Controlled Oscillator-Based Low-Supply-Voltage Microbolometer Readout Architecture.
J. Circuits Syst. Comput., 2020
Proceedings of the 2020 IEEE Wireless Communications and Networking Conference, 2020
2019
Proceedings of the 27th Signal Processing and Communications Applications Conference, 2019
2018
Proceedings of the 26th Signal Processing and Communications Applications Conference, 2018
Proceedings of the 26th Signal Processing and Communications Applications Conference, 2018
Proceedings of the 26th Signal Processing and Communications Applications Conference, 2018
2017
Design of frequency upconversion and downconversion blocks for 240 GHz communication systems.
Proceedings of the 25th Signal Processing and Communications Applications Conference, 2017
Proceedings of the 25th Signal Processing and Communications Applications Conference, 2017
2016
Proceedings of the 24th Signal Processing and Communication Application Conference, 2016
Proceedings of the 45th International Conference on Parallel Processing Workshops, 2016
2015
An EG-LDPC Based 2-Dimensional Error Correcting Code for Mitigating MBUs of SRAM Memories.
Proceedings of the 12th FPGAworld Conference 2015, 2015
2009
Low BER performance estimation of LDPC codes via application of importance sampling to trapping sets.
IEEE Trans. Commun., 2009
2006
IEEE Trans. Circuits Syst. I Regul. Pap., 2006
Proceedings of IEEE International Conference on Communications, 2006
2005
A performance improvement and error floor avoidance technique for belief propagation decoding of LDPC codes.
Proceedings of the IEEE 16th International Symposium on Personal, 2005
2001
Proceedings of the IEEE International Conference on Communications, 2001