Enrique Guzmán

Orcid: 0000-0002-0887-9078

Affiliations:
  • Technological University of the Mixteca, Institute of Electronic and Computer Engineering, Oaxaca, Mexico


According to our database1, Enrique Guzmán authored at least 25 papers between 2004 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
An FPGA-based tool for supporting the design, modeling, and evaluation of hybrid object recognition systems on computer engineering courses.
Comput. Appl. Eng. Educ., May, 2024

2023
Collaborative Working Spheres for Global Software Development Education During the COVID-19 Pandemic: An International Experience.
IEEE Access, 2023

2022
HS-IDEOR - A tool for conceptual modeling and designing of hardware architectures focused on object recognition.
Comput. Appl. Eng. Educ., 2022

2021
Common Sense Knowledge Learning for Open Vocabulary Neural Reasoning: A First View into Chronic Disease Literature.
CoRR, 2021

2020
Introducing a robotic hand to support lecture-based courses on mechatronics systems design at the undergraduate level.
Comput. Appl. Eng. Educ., 2020

2019
A "learning by design" application for modeling, implementing, and evaluating hardware architectures for artificial neural networks at undergraduate level.
Comput. Appl. Eng. Educ., 2019

A FPGA-based experimentation system for designing, implementing, and evaluating real-time video processing and analysis algorithms at undergraduate level.
Comput. Appl. Eng. Educ., 2019

2017
Teaching real-time video processing theory by using an FPGA-based educational system and the "learning-by-doing" method.
Comput. Appl. Eng. Educ., 2017

2015
CoLFDImaP: A web-based tool for teaching of FPGA-based digital image processing in undergraduate courses.
Comput. Appl. Eng. Educ., 2015

2014
Generalized Proportional Integral Tracking Controller for a Single-Phase Multilevel Cascade Inverter: An FPGA Implementation.
IEEE Trans. Ind. Informatics, 2014

2013
Using the project-based learning approach for incorporating an FPGA-based integrated hardware/software tool for implementing and evaluating image processing algorithms into graduate level courses.
Comput. Appl. Eng. Educ., 2013

2012
FPGA-Based Architecture for Extended Associative Memories and Its Application in Image Recognition.
Proceedings of the Advances in Artificial Intelligence, 2012

2011
LAMDA Methodology Applied to Image Vector Quantization.
Proceedings of the Computer Recognition Systems 4, 2011

A Tool for Implementing and Evaluating Image Processing Algorithms inside FPGA Circuits.
Proceedings of the Computer Recognition Systems 4, 2011

A Comparison Between the GPI and PID Controllers for the Stabilization of a DC-DC "Buck" Converter: A Field Programmable Gate Array Implementation.
IEEE Trans. Ind. Electron., 2011

Grayscale Image Segmentation Based on Associative Memories.
Computación y Sistemas, 2011

Using Associative Memories for Image Segmentation.
Proceedings of the Advances in Neural Networks - ISNN 2011, 2011

2009
Vector Quantization Algorithm Based on Associative Memories.
Proceedings of the MICAI 2009: Advances in Artificial Intelligence, 2009

2008
Morphological Transform for Image Compression.
EURASIP J. Adv. Signal Process., 2008

A Fast Search Algorithm for Vector Quantization Based on Associative Memories.
Proceedings of the Progress in Pattern Recognition, 2008

2007
Hardware Implementation of Image Recognition System Based on Morphological Associative Memories and Discrete Wavelet Transform.
Proceedings of the Advances in Image and Video Technology, Second Pacific Rim Symposium, 2007

Design of an Evolutionary Codebook Based on Morphological Associative Memories.
Proceedings of the MICAI 2007: Advances in Artificial Intelligence, 2007

2006
Image Compression Algorithm Based on Morphological Associative Memories.
Proceedings of the Progress in Pattern Recognition, 2006

2004
Diseño de Control Difuso Usando Promedio de Pesos e Implementado con Lenguaje Verilog.
Polibits, 2004

Sistema Autónomo para la Manipulación de Video en Tiempo Real Basado en un FPGA.
Polibits, 2004


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