Enrique Alvarez
Orcid: 0000-0002-2446-0445Affiliations:
- University of California at San Diego, La Jolla, CA, USA
- Pontifical Catholic University of Chile, Department of Electrical Engineering, Chile
According to our database1,
Enrique Alvarez
authored at least 12 papers
between 2013 and 2024.
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Bibliography
2024
A Duty-Cycle-Error-Immune Reference Frequency Doubling Technique for Fractional-N Digital PLLs.
IEEE Trans. Circuits Syst. I Regul. Pap., October, 2024
2021
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
A Time Amplifier Assisted Frequency-to-Digital Converter Based Digital Fractional-N PLL.
IEEE J. Solid State Circuits, 2021
IEEE J. Solid State Circuits, 2021
2019
Proceedings of the IEEE Latin American Test Symposium, 2019
2018
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
IEEE J. Solid State Circuits, 2018
2017
A 64×64 high-density redox amplified coulostatic discharge-based biosensor array in 180nm CMOS.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017
2016
Logica Universalis, 2016
2015
2014
Digital assistance for energy reduction in ADCs using a simple signal prediction algorithm.
Proceedings of the IEEE 5th Latin American Symposium on Circuits and Systems, 2014
2013
Fully-differential offset-cancelling circuit with configurable output common-mode voltage.
Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013