Enrico Monaco
According to our database1,
Enrico Monaco
authored at least 19 papers
between 2009 and 2024.
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Bibliography
2024
A 5nm 60GS/s 7b 64-Way Time Interleaved Partial Loop Unrolled SAR ADC Achieving 34dB SNDR up to 32GHz.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
A 800Gb/s Transceiver for PAM-4 Optical Direct-Detection Applications in 5nm FinFet Process.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
2023
Analysis and Design of a Low Power Double Tail Comparator with Dynamic Bias in 5nm FinFET Technology.
Proceedings of the 18th Conference on Ph.D Research in Microelectronics and Electronics, 2023
A 0.94 V Dynamic Bias Double Tail Comparator for High-Speed Applications in 5 nm Technology.
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2023
2021
IEEE Trans. Circuits Syst. II Express Briefs, 2021
A High Linearity Driver with Embedded Interleaved Track-and-Hold Array for High-Speed ADC.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Proceedings of the 28th IEEE International Conference on Electronics, 2021
2018
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
Flexible Transversal Continuous-Time Linear Equalizer Operating up to 25Gb/s in 28nm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
2017
A 2-11 GHz 7-Bit High-Linearity Phase Rotator Based on Wideband Injection-Locking Multi-Phase Generation for High-Speed Serial Links in 28-nm CMOS FDSOI.
IEEE J. Solid State Circuits, 2017
6.4 A 64Gb/s PAM-4 transmitter with 4-Tap FFE and 2.26pJ/b energy efficiency in 28nm CMOS FDSOI.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
2016
A 0.2-11.7GHz, high accuracy injection-locking multi-phase generation with mixed analog/digital calibration loops in 28nm FDSOI CMOS.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016
2013
A 33.6-to-46.2GHz 32nm CMOS VCO with 177.5dBc/Hz minimum noise FOM using inductor splitting for tuning extension.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
2011
A Low-Noise Quadrature VCO Based on Magnetically Coupled Resonators and a Wideband Frequency Divider at Millimeter Waves.
IEEE J. Solid State Circuits, 2011
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
2010
IEEE J. Solid State Circuits, 2010
A 13.1% tuning range 115GHz frequency generator based on an injection-locked frequency doubler in 65nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
2009
A 5.2mW ku-band CMOS injection-locked frequency doubler with differential input / output.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009