Enrico Mammei

Orcid: 0000-0002-4608-070X

According to our database1, Enrico Mammei authored at least 6 papers between 2013 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
An Integrated Dual-Mode Precise Bias Circuit and a Low-Noise and Wideband AFE for Fly Height Sensors in Hard Disk Drives.
IEEE Trans. Circuits Syst. I Regul. Pap., October, 2024

2017
A 25mW Highly Linear Continuous-Time FIR Equalizer for 25Gb/s Serial Links in 28-nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

2015
A low-noise programmable-gain amplifier for 25 Gb/s multi-mode fiber receivers in 28nm CMOS FDSOI.
Proceedings of the ESSCIRC Conference 2015, 2015

2014
Analysis and Design of a Power-Scalable Continuous-Time FIR Equalizer for 10 Gb/s to 25 Gb/s Multi-Mode Fiber EDC in 28 nm LP CMOS.
IEEE J. Solid State Circuits, 2014

8.3 A power-scalable 7-tap FIR equalizer with tunable active delay line for 10-to-25Gb/s multi-mode fiber EDC in 28nm LP-CMOS.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2013
A 33.6-to-46.2GHz 32nm CMOS VCO with 177.5dBc/Hz minimum noise FOM using inductor splitting for tuning extension.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013


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