Enrico Costenaro

According to our database1, Enrico Costenaro authored at least 17 papers between 2011 and 2015.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2015
Comprehensive Analysis of Sequential and Combinational Soft Errors in an Embedded Processor.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Flip-flop SEU reduction through minimization of the temporal vulnerability factor (TVF).
Proceedings of the 21st IEEE International On-Line Testing Symposium, 2015

A call for cross-layer and cross-domain reliability analysis and management.
Proceedings of the 21st IEEE International On-Line Testing Symposium, 2015

2014
Managing SER costs of complex systems through Linear Programming.
Proceedings of the 2014 IEEE 20th International On-Line Testing Symposium, 2014

Exploring the state dependent SET sensitivity of asynchronous logic - The muller-pipeline example.
Proceedings of the 32nd IEEE International Conference on Computer Design, 2014

INFORMER: An integrated framework for early-stage memory robustness analysis.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Comprehensive analysis of alpha and neutron particle-induced soft errors in an embedded processor at nanoscales.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013
A Practical Approach to Single Event Transient Analysis for Highly Complex Design.
J. Electron. Test., 2013

Pulse-length determination techniques in the rectangular single event transient fault model.
Proceedings of the 2013 International Conference on Embedded Computer Systems: Architectures, 2013

Hierarchical RTL-based combinatorial SER estimation.
Proceedings of the 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 2013

State-aware single event analysis for sequential logic.
Proceedings of the 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 2013

2012
A real-case application of a synergetic design-flow-oriented SER analysis.
Proceedings of the 18th IEEE International On-Line Testing Symposium, 2012

RIIF - Reliability information interchange format.
Proceedings of the 18th IEEE International On-Line Testing Symposium, 2012

Towards optimized functional evaluation of SEE-induced failures in complex designs.
Proceedings of the 18th IEEE International On-Line Testing Symposium, 2012

A novel variation-tolerant 4T-DRAM cell with enhanced soft-error tolerance.
Proceedings of the 30th International IEEE Conference on Computer Design, 2012

2011
A new IP core for fast error detection and fault tolerance in COTS-based solid state mass memories.
Proceedings of the 17th IEEE International On-Line Testing Symposium (IOLTS 2011), 2011

A Practical Approach to Single Event Transients Analysis for Highly Complex Designs.
Proceedings of the 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2011


  Loading...