Engin Ipek
Orcid: 0000-0003-2809-5809Affiliations:
- Microsoft Research
According to our database1,
Engin Ipek
authored at least 51 papers
between 2005 and 2024.
Collaborative distances:
Collaborative distances:
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on orcid.org
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Bibliography
2024
2021
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021
2020
IEEE Comput. Archit. Lett., 2020
Commutative Data Reordering: A New Technique to Reduce Data Movement Energy on Sparse Inference Workloads.
Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020
2019
Content Aware Refresh: Exploiting the Asymmetry of DRAM Retention Errors to Reduce the Refresh Frequency of Less Vulnerable Data.
IEEE Trans. Computers, 2019
Memristive Accelerators for Dense and Sparse Linear Algebra: From Machine Learning to High-Performance Scientific Computing.
IEEE Micro, 2019
2018
Sanitizer: Mitigating the Impact of Expensive ECC Checks on STT-MRAM Based Main Memories.
IEEE Trans. Computers, 2018
Multiscale Co-Design Analysis of Energy, Latency, Area, and Accuracy of a ReRAM Analog Neural Training Accelerator.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018
IEEE Comput. Archit. Lett., 2018
Bit-Level Load Balancing: A New Technique for Improving the Write Throughput of Deeply Scaled STT-MRAM.
IEEE Comput. Archit. Lett., 2018
Proceedings of the 45th ACM/IEEE Annual International Symposium on Computer Architecture, 2018
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2018
2017
Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems, 2017
2016
Reducing Switching Latency and Energy in STT-MRAM Caches With Field-Assisted Writing.
IEEE Trans. Very Large Scale Integr. Syst., 2016
IEEE Trans. Very Large Scale Integr. Syst., 2016
Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016
Memristive Boltzmann machine: A hardware accelerator for combinatorial optimization and deep learning.
Proceedings of the 2016 IEEE International Symposium on High Performance Computer Architecture, 2016
2015
Energy-Efficient Nonvolatile Flip-Flop With Subnanosecond Data Backup Time for Fine-Grain Power Gating.
IEEE Trans. Circuits Syst. II Express Briefs, 2015
IEEE Micro, 2015
More is less: improving the energy efficiency of data movement via opportunistic use of sparse codes.
Proceedings of the 48th International Symposium on Microarchitecture, 2015
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015
Architecting a MOS current mode logic (MCML) processor for fast, low noise and energy-efficient computing in the near-threshold regime.
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015
2014
Microelectron. J., 2014
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
2013
ACM Trans. Comput. Syst., 2013
Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture, 2013
Proceedings of the 40th Annual International Symposium on Computer Architecture, 2013
2012
Proceedings of the IEEE 25th International SOC Conference, 2012
Proceedings of the 39th International Symposium on Computer Architecture (ISCA 2012), 2012
Overcoming single-thread performance hurdles in the core fusion reconfigurable multicore architecture.
Proceedings of the International Conference on Supercomputing, 2012
2011
Proceedings of the 44rd Annual IEEE/ACM International Symposium on Microarchitecture, 2011
2010
Resistive computation: avoiding the power wall with low-leakage, STT-MRAM based computing.
Proceedings of the 37th International Symposium on Computer Architecture (ISCA 2010), 2010
Dynamically replicated memory: building reliable systems from nanoscale resistive memories.
Proceedings of the 15th International Conference on Architectural Support for Programming Languages and Operating Systems, 2010
2009
Proceedings of the 22nd ACM Symposium on Operating Systems Principles 2009, 2009
Proceedings of the 36th International Symposium on Computer Architecture (ISCA 2009), 2009
2008
ACM Trans. Archit. Code Optim., 2008
Coordinated management of multiple interacting resources in chip multiprocessors: A machine learning approach.
Proceedings of the 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), 2008
Proceedings of the 35th International Symposium on Computer Architecture (ISCA 2008), 2008
2007
Concurr. Comput. Pract. Exp., 2007
Proceedings of the 34th International Symposium on Computer Architecture (ISCA 2007), 2007
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007
Proceedings of the 37th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2007
2006
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006
Proceedings of the 12th International Conference on Architectural Support for Programming Languages and Operating Systems, 2006
2005
Proceedings of the Euro-Par 2005, Parallel Processing, 11th International Euro-Par Conference, Lisbon, Portugal, August 30, 2005