Endri Kaja

According to our database, Endri Kaja authored at least 15 papers between 2021 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Fake Timer: An Engine for Accurate Timing Estimation in Register Transfer Level Designs.

Daniela Sanchez Lopera, Robert Kunzelmann, Endri Kaja, Wolfgang Ecker

Proceedings of the 25th International Symposium on Quality Electronic Design, 2024

An Automated Exhaustive Fault Analysis Technique guided by Processor Formal Verification Methods.

Endri Kaja, Nicolas Gerlin, Bihan Zhao, Daniela Sanchez Lopera, Jad Al Halabi, Azam Sher Khan, Sebastian Prebeck, Dominik Stoffel, Wolfgang Kunz, Wolfgang Ecker

Proceedings of the 25th International Symposium on Quality Electronic Design, 2024

Special Session: A Mixed Simulation-, Emulation-, and Formal-Based Fault Analysis Methodology for RISC-V.

Endri Kaja, Nicolas Gerlin, Ares Tahiraga, Jad Al Halabi, Sebastian Prebeck, Dominik Stoffel, Wolfgang Kunz, Wolfgang Ecker

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2024

An Automated and Effective Approach for SBST Generation Targeting RISC-V CPUs.

Endri Kaja, Nicolas Gerlin, Jad Al Halabi, Ares Tahiraga, Sebastian Prebeck, Dominik Stoffel, Wolfgang Kunz, Wolfgang Ecker

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2024

PaGoRi:A Scalable Parallel Golomb-Rice Decoder.

Mounika Vaddeboina, Endri Kaja, Alper Yilmazer, Uttal Ghosh, Wolfgang Ecker

Proceedings of the 27th International Symposium on Design & Diagnostics of Electronic Circuits & Systems, 2024

2023

Modelling Peripheral Designs using FSM-like Notation for Complete Property Set Generation.

Endri Kaja, Nicolas Gerlin, Robert Kunzelmann, Keerthikumara Devarajegowda, Wolfgang Ecker

Proceedings of the 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2023

Parallel Golomb-Rice Decoder with 8-bit Unary Decoding for Weight Compression in TinyML Applications.

Mounika Vaddeboina, Endri Kaja, Alper Yilmayer, Sebastian Prebeck, Wolfgang Ecker

Proceedings of the 26th Euromicro Conference on Digital System Design, 2023

Bits, Flips and RISCs.

Nicolas Gerlin, Endri Kaja, Fabian Vargas, Li Lu, Anselm Breitenreiter, Junchao Chen, Markus Ulbricht, Maribel Gomez, Ares Tahiraga, Sebastian Prebeck, Eyck Jentzsch, Milos Krstic, Wolfgang Ecker

Proceedings of the 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2023

2022

MetFI: Model-driven Fault Simulation Framework.

Endri Kaja, Nicolas Gerlin, Luis Rivas, Monideep Bora, Keerthikumara Devarajegowda, Wolfgang Ecker

CoRR, 2022

Fast and Accurate Model-Driven FPGA-based System-Level Fault Emulation.

Endri Kaja, Nicolas Gerlin, Monideep Bora, Gabriel Rutsch, Keerthikumara Devarajegowda, Dominik Stoffel, Wolfgang Kunz, Wolfgang Ecker

Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022

Design of a Tightly-Coupled RISC-V Physical Memory Protection Unit for Online Error Detection.

Nicolas Gerlin, Endri Kaja, Monideep Bora, Keerthikumara Devarajegowda, Dominik Stoffel, Wolfgang Kunz, Wolfgang Ecker

Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022

MetaFS: Model-driven Fault Simulation Framework.

Endri Kaja, Nicolas Gerlin, Monideep Bora, Keerthikumara Devarajegowda, Dominik Stoffel, Wolfgang Kunz, Wolfgang Ecker

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2022

2021

Extending Verilator to Enable Fault Simulation.

Endri Kaja, Nicolas Ojeda Leon, Michael Werner, Bogdan-Andrei Tabacaru, Keerthikumara Devarajegowda, Wolfgang Ecker

Proceedings of the Methods and Description Languages for Modelling and Verification of Circuits and Systems, 2021

Towards Fault Simulation at Mixed Register-Transfer/Gate-Level Models.

Endri Kaja, Nicolas Gerlin, Mounika Vaddeboina, Luis Rivas, Sebastian Siegfried Prebeck, Zhao Han, Keerthikumara Devarajegowda, Wolfgang Ecker

Proceedings of the 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2021

ISA Modeling with Trace Notation for Context Free Property Generation.

Keerthikumara Devarajegowda, Endri Kaja, Sebastian Siegfried Prebeck, Wolfgang Ecker

Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021