Emre Ayranci

According to our database, Emre Ayranci authored at least 5 papers between 2007 and 2011.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2011

An 800 MS/s Dual-Residue Pipeline ADC in 40 nm CMOS.

Davide Vecchi, Jan Mulder, Frank M. L. van der Goes, Jan R. Westra, Emre Ayranci, Christopher M. Ward, Jiansong Wan, Klaas Bult

IEEE J. Solid State Circuits, 2011

An 800MS/s dual-residue pipeline ADC in 40nm CMOS.

Jan Mulder, Frank M. L. van der Goes, Davide Vecchi, Jan R. Westra, Emre Ayranci, Christopher M. Ward, Jiansong Wan, Klaas Bult

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2009

A 12 bit 2.9 GS/s DAC With IM3 ≪ -60 dBc Beyond 1 GHz in 65 nm CMOS.

Chi-Hung Lin, Frank M. L. van der Goes, Jan R. Westra, Jan Mulder, Yu Lin, Erol Arslan, Emre Ayranci, Xiaodong Liu, Klaas Bult

IEEE J. Solid State Circuits, 2009

A 12b 2.9GS/s DAC with IM3 ≪-60dBc beyond 1GHz in 65nm CMOS.

Chi-Hung Lin, Frank M. L. van der Goes, Jan R. Westra, Jan Mulder, Yu Lin, Erol Arslan, Emre Ayranci, Xiaodong Liu, Klaas Bult

Proceedings of the IEEE International Solid-State Circuits Conference, 2009

2007

45% Power Saving in a 0.25μm BiCMOS 10Gb/s 50Ω-Terminated Packaged Active-Load Laser Driver.

Emre Ayranci, Kenn Christensen, Pietro Andreani

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007