Emran K. Ashik

According to our database, Emran K. Ashik authored at least 2 papers in 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

A 600V Half-Bridge Power Stage Fully Integrated with 25V Gate-Drivers in SiC CMOS Technology.

Hua Zhang, Tianshi Liu, Utsav Gupta, Sundar Babu Isukapati, Emran K. Ashik, Adam J. Morgan, Bongmook Lee, Woongje Sung, Anant K. Agarwal, Ayman A. Fayed

Proceedings of the 65th IEEE International Midwest Symposium on Circuits and Systems, 2022

Bias Temperature Instability on SiC n- and p-MOSFETs for High Temperature CMOS Applications.

Emran K. Ashik, Sundar Babu Isukapati, Hua Zhang, Tianshi Liu, Utsav Gupta, Adam J. Morgan, Veena Misra, Woongje Sung, Ayman A. Fayed, Anant K. Agarwal, Bongmook Lee

Proceedings of the IEEE International Reliability Physics Symposium, 2022