Emanuele Depaoli

Orcid: 0000-0002-7018-8788

According to our database1, Emanuele Depaoli authored at least 6 papers between 2006 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2019
A 64 Gb/s Low-Power Transceiver for Short-Reach PAM-4 Electrical Links in 28-nm FDSOI CMOS.
IEEE J. Solid State Circuits, 2019

2018
A 4.9pJ/b 16-to-64Gb/s PAM-4 VSR transceiver in 28nm FDSOI CMOS.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2017
6.4 A 64Gb/s PAM-4 transmitter with 4-Tap FFE and 2.26pJ/b energy efficiency in 28nm CMOS FDSOI.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2009
A Multi-Standard 1.5 to 10 Gb/s Latch-Based 3-Tap DFE Receiver With a SSC Tolerant CDR for Serial Backplane Communication.
IEEE J. Solid State Circuits, 2009

2008
A 10Gb/s receiver with linear backplane equalization and mixer-based self-aligned CDR.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2006
Common Gate Transformer Feedback LNA in a High IIP3 Current Mode RF CMOS Front-End.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006


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