Emanuel M. Popovici

Orcid: 0000-0001-6813-5030

Affiliations:
  • University College Cork, Ireland


According to our database1, Emanuel M. Popovici authored at least 110 papers between 1999 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Dragon_Pi: IoT Side-Channel Power Data Intrusion Detection Dataset and Unsupervised Convolutional Autoencoder for Intrusion Detection.
Future Internet, March, 2024

A Scalable Security Approach in IoT Networks: Smart Contracts and Anomaly-Based IDS for Gateways Using Hardware Accelerators.
IEEE Access, 2024

Enhancing Security and Scalability in IoT Networks Applying Blockchain Technology.
Proceedings of the Cooperative Design, Visualization, and Engineering, 2024

2023
Attacks on IoT: Side-Channel Power Acquisition Framework for Intrusion Detection.
Future Internet, May, 2023

HH-NIDS: Heterogeneous Hardware-Based Network Intrusion Detection Framework for IoT Security.
Future Internet, 2023

American Multinomial Option Pricing on FPGA using OneAPI.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

A real-time and ultra-low power implementation of an AI-assisted sonification algorithm for neonatal EEG.
Proceedings of the 9th International Workshop on Advances in Sensors and Interfaces, 2023

2022
A parallel and pipelined implementation of a pascal-simplex based multi-asset option pricer on FPGA using OpenCL.
Microprocess. Microsystems, April, 2022

An implementation of an AI-assisted sonification algorithm for neonatal EEG seizure detection on an edge device.
Proceedings of the IEEE-EMBS International Conference on Biomedical and Health Informatics, 2022

2021
An Accurate and Compact Hyperbolic Tangent and Sigmoid Computation Based Stochastic Logic.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

FPGA Hardware Acceleration Framework for Anomaly-based Intrusion Detection System in IoT.
Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

Automatic segmentation for neonatal phonocardiogram.
Proceedings of the 43rd Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2021

An EEG analysis framework through AI and sonification on low power IoT edge devices.
Proceedings of the 43rd Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2021

2020
A Parallel and Pipelined Implementation of a Pascal-Simplex Based Two Asset Option Pricer on FPGA using OpenCL.
Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2020, Oslo, 2020

2019
Analysis of a Low-Cost EEG Monitoring System and Dry Electrodes toward Clinical Use in the Neonatal ICU.
Sensors, 2019

SmarTEG: An Autonomous Wireless Sensor Node for High Accuracy Accelerometer-Based Monitoring.
Sensors, 2019

Efficient Architectures and Implementation of Arithmetic Functions Approximation Based Stochastic Computing.
Proceedings of the 30th IEEE International Conference on Application-specific Systems, 2019

2018
On sound-based interpretation of neonatal EEG.
CoRR, 2018

System Level Framework for Assessing the Accuracy of Neonatal EEG Acquisition.
Proceedings of the 40th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2018

Neonatal EEG Interpretation and Decision Support Framework for Mobile Platforms.
Proceedings of the 40th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2018

2017
Comparison of electrode technologies for dry and portable EEG acquisition.
Proceedings of the 7th IEEE International Workshop on Advances in Sensors and Interfaces, 2017

ECO: An IoT platform for wireless data collection, energy control and optimization of a miniaturized wind turbine cluster: Power analysis and battery life estimation of IoT platform.
Proceedings of the IEEE International Conference on Industrial Technology, 2017

Portable neonatal EEG monitoring and sonification on an Android device.
Proceedings of the 2017 39th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), 2017

2016
Design, Implementation, and Performance Evaluation of a Flexible Low-Latency Nanowatt Wake-Up Radio Receiver.
IEEE Trans. Ind. Informatics, 2016

An Energy Aware Adaptive Sampling Algorithm for Energy Harvesting WSN with Energy Hungry Sensors.
Sensors, 2016

An EDA Framework for Reliability Estimation and Optimization of Combinational Circuits.
J. Low Power Electron., 2016

b+WSN: Smart beehive with preliminary decision tree analysis for agriculture and honey bee health monitoring.
Comput. Electron. Agric., 2016

A supply voltage-dependent variation aware reliability evaluation model.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2016

Reliability analysis of memory centric LDPC decoders under probabilistic storage failures.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

Practical LDPC encoders robust to hardware errors.
Proceedings of the 2016 IEEE International Conference on Communications, 2016

CPE: Codeword Prediction Encoder.
Proceedings of the 21th IEEE European Test Symposium, 2016

2015
Inverse Gaussian distribution based timing analysis of Sub-threshold CMOS circuits.
Microelectron. Reliab., 2015

Energy aware adaptive sampling algorithm for energy harvesting wireless sensor networks.
Proceedings of the IEEE Sensors Applications Symposium, 2015

b+WSN: Smart beehive for agriculture, environmental, and honey bee health monitoring - Preliminary results and analysis.
Proceedings of the IEEE Sensors Applications Symposium, 2015

Big brother for bees (3B) - Energy neutral platform for remote monitoring of beehive imagery and sound.
Proceedings of the 6th International Workshop on Advances in Sensors and Interfaces, 2015

i4Toys: Video technology in toys for improved access to play, entertainment, and education.
Proceedings of the 2015 IEEE International Symposium on Technology and Society, 2015

Efficient realization of probabilistic gradient descent bit flipping decoders.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

ROST-C: Reliability driven optimisation and synthesis techniques for combinational circuits.
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015

Development of an heterogeneous wireless sensor network for instrumentation and analysis of beehives.
Proceedings of the 2015 IEEE International Instrumentation and Measurement Technology Conference (I2MTC) Proceedings, 2015

Asynchronous Charge Sharing Power Consistent Montgomery Multiplier.
Proceedings of the 21st IEEE International Symposium on Asynchronous Circuits and Systems, 2015

2014
Ensuring Survivability of Resource-Intensive Sensor Networks Through Ultra-Low Power Overlays.
IEEE Trans. Ind. Informatics, 2014

Extended Wireless Monitoring Through Intelligent Hybrid Energy Supply.
IEEE Trans. Ind. Electron., 2014

A low power wireless node for contact and contactless heart monitoring.
Microelectron. J., 2014

Wake-up radio receiver based power minimization techniques for wireless sensor networks: A review.
Microelectron. J., 2014

Efficient VLSI architecture for interpolation decoding of hermitian codes.
IET Commun., 2014

Transmission Channel Noise Aware Energy Effective LDPC Decoding.
Proceedings of the VLSI-SoC: Internet of Things Foundations, 2014

Towards energy effective LDPC decoding by exploiting channel noise variability.
Proceedings of the 22nd International Conference on Very Large Scale Integration, 2014

Reliability aware logic synthesis through rewriting.
Proceedings of the 27th IEEE International System-on-Chip Conference, 2014

Robust sub-powered asynchronous logic.
Proceedings of the 24th International Workshop on Power and Timing Modeling, 2014

Cost effective FPGA probabilistic fault emulation.
Proceedings of the 2014 NORCHIP, Tampere, Finland, October 27-28, 2014, 2014

Linear Compositional Delay Model for the Timing Analysis of Sub-Powered Combinational Circuits.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014

Probabilistic Gate Level Fault Modeling for Near and Sub-Threshold CMOS Circuits.
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

Low complexity QRS detectors for performance and energy aware applications.
Proceedings of IEEE-EMBS International Conference on Biomedical and Health Informatics, 2014

2013
Wearable low power dry surface wireless sensor node for healthcare monitoring application.
Proceedings of the 9th IEEE International Conference on Wireless and Mobile Computing, 2013

Ultra low power asynchronous MAC protocol using wake-up radio for energy neutral WSN.
Proceedings of the 1st International Workshop on Energy Neutral Sensing Systems, 2013

Demo Abstract: SmartSync; When Toys Meet Wireless Sensor Networks.
Proceedings of the Real-World Wireless Sensor Networks, 2013

Power management techniques for Wireless Sensor Networks: A review.
Proceedings of the 5th IEEE International Workshop on Advances in Sensors and Interfaces, 2013

A versatile biomedical wireless sensor node with novel drysurface sensors and energy efficient power management.
Proceedings of the 5th IEEE International Workshop on Advances in Sensors and Interfaces, 2013

Low-power wireless accelerometer-based system for wear detection of bandsaw blades.
Proceedings of the 11th IEEE International Conference on Industrial Informatics, 2013

Combination of hybrid energy harvesters with MEMS piezoelectric and nano-Watt radio wake up to extend lifetime of system for wireless sensor nodes.
Proceedings of the ARCS 2013, 2013

Simplified Commissioning and Maintenance for Wireless Sensor Networks: a Novel Software Tool.
Proceedings of the ARCS 2013, 2013

2012
Ultra Low Power Signal Oriented Approach for Wireless Health Monitoring.
Sensors, 2012

Ultra Low Power Asynchronous Charge Sharing Logic.
J. Low Power Electron., 2012

Improving Power Efficiency in WBAN Communication Using Wake Up Methods.
Proceedings of the Wireless Mobile Communication and Healthcare, 2012

Combined methods to extend the lifetime of power hungry WSN with multimodal sensors and nanopower wakeups.
Proceedings of the 8th International Wireless Communications and Mobile Computing Conference, 2012

Smart power unit with ultra low power radio trigger capabilities for wireless sensor networks.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

A Novel and Miniaturized 433/868MHz Multi-band Wireless Sensor Platform for Body Sensor Network Applications.
Proceedings of the 2012 Ninth International Conference on Wearable and Implantable Body Sensor Networks, 2012

Ultra Low Power Booth Multiplier Using Asynchronous Logic.
Proceedings of the 18th IEEE International Symposium on Asynchronous Circuits and Systems, 2012

2011
Nano-Power Wireless Wake-Up Receiver With Serial Peripheral Interface.
IEEE J. Sel. Areas Commun., 2011

Network-on-Chip interconnect for pairing-based cryptographic IP cores.
J. Syst. Archit., 2011

Timing-Driven Power Optimisation and Power-Driven Timing Optimisation of Combinational Circuits.
J. Low Power Electron., 2011

Power efficient networking using a novel wake-up radio.
Proceedings of the 5th International Conference on Pervasive Computing Technologies for Healthcare, 2011

Interconnect Physical Analyser (IPAA) applied to the design of scalable Network-on-Chip interconnect for Cryptographic accelerators.
Proceedings of the NOCS 2011, 2011

A graph theoretical approach for network coding in wireless body area networks.
Proceedings of the 2011 IEEE International Symposium on Information Theory Proceedings, 2011

The s-Mote: A versatile heterogeneous multi-radio platform for wireless sensor networks applications.
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011

Design of a Low Power, Sub-Threshold, Asynchronous Arithmetic Logic Unit Using a Bidirectional Adder.
Proceedings of the 14th Euromicro Conference on Digital System Design, 2011

Remote Electricity Actuation and Monitoring mote.
Proceedings of the Distributed Computing in Sensor Systems, 2011

2010
Delay dependent power optimisation of combinational circuits using AND-Inverter graphs.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2010, 2010

Subfield-subcodes of Generalized Toric codes.
Proceedings of the IEEE International Symposium on Information Theory, 2010

Design and analysis of a novel 8T SRAM cell for adiabatic and non-adiabatic operations.
Proceedings of the 17th IEEE International Conference on Electronics, 2010

Static Average Case Power Estimation Technique for Block Ciphers.
Proceedings of the 13th Euromicro Conference on Digital System Design, 2010

Reversible online BIST using bidirectional BILBO.
Proceedings of the 7th Conference on Computing Frontiers, 2010

2009
Energy-Efficient Low Duty Cycle MAC Protocol for Wireless Body Area Networks.
IEEE Trans. Inf. Technol. Biomed., 2009

Hardware Implementation of GF(2<sup>m</sup>) LDPC Decoders.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009

Error resilient data transport in sensor network applications: A generic perspective.
Int. J. Circuit Theory Appl., 2009

A low-power pairing-based cryptographic accelerator for embedded security applications.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009

Energy-Aware Dynamic Route Management for THAWS.
Proceedings of the Sensor Systems and Software, 2009

BSAA: A Switching Activity Analysis and Visualisation Tool for SoC Power Optimisation.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2009

2008
Versatile processor for GF(p<sup>m</sup>) arithmetic for use in cryptographic applications.
IET Comput. Digit. Tech., 2008

HotSpot: Visualizing dynamic power consumption in RTL designs.
Proceedings of the 2008 East-West Design & Test Symposium, 2008

2007
Comparison of Simple Power Analysis Attack Resistant Algorithms for an Elliptic Curve Cryptosystem.
J. Comput., 2007

Versatile hardware architectures for GF(p<sup>m</sup>) arithmetic in public key cryptography.
Integr., 2007

SPA resistant elliptic curve cryptosystem using addition chains.
Int. J. High Perform. Syst. Archit., 2007

FPGA Implementations of LDPC over GF(2<sup>m</sup>) Decoders.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2007

A Low Complexity Algorithm and Architecture for Systematic Encoding of Hermitian Codes.
Proceedings of the IEEE International Symposium on Information Theory, 2007

A Parallel Architecture for Hermitian Decoders: Satisfying Resource and Throughput Constraints.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Efficient construction and implementation of short LDPC codes for wireless sensor networks.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007

Design and implementation of a miniaturised, low power wireless sensor node.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007

Low cost error recovery in Delay-Intolerant Wireless Sensor Networks.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007

2006
A Simplified Derivation of Timing Complexity Lower Bounds for Sorting by Comparisons.
Nord. J. Comput., 2006

2005
FOX Algorithm Implementation: a hardware design approach.
IACR Cryptol. ePrint Arch., 2005

Efficient hardware for the Tate pairing calculation in characteristic three.
IACR Cryptol. ePrint Arch., 2005

Reduced complexity, FPGA implementation of quasi-cyclic LDPC decoder.
Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005

Versatile architectures for decoding a class of LDPC codes.
Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005

2004
An FPGA implementation of a GF(p) ALU for encryption processors.
Microprocess. Microsystems, 2004

Algorithms and Architectures for Use in FPGA Implementations of Identity Based Encryption Schemes.
Proceedings of the Field Programmable Logic and Application, 2004

2003
Algorithm and architecture for a Galois field multiplicative arithmetic processor.
IEEE Trans. Inf. Theory, 2003

Fast Modular Division for Application in ECC on Reconfigurable Logic.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

2002
Fully Parameterizable Elliptic Curve Cryptography Processor over GF(2).
Proceedings of the Field-Programmable Logic and Applications, 2002

1999
FPGA Design Trade-Offs for Solving the Key Equation in Reed-Solomon Decoding.
Proceedings of the Field-Programmable Logic and Applications, 9th International Workshop, 1999


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