Elvira Teran

According to our database, Elvira Teran authored at least 8 papers between 2016 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Last-Level Cache Insertion and Promotion Policy in the Presence of Aggressive Prefetching.

Daniel A. Jiménez, Elvira Teran, Paul V. Gratz

IEEE Comput. Archit. Lett., 2023

2022

The Championship Simulator: Architectural Simulation for Education and Competition.

Nathan Gober, Gino Chacon, Lei Wang, Paul V. Gratz, Daniel A. Jiménez, Elvira Teran, Seth H. Pugsley, Jinchun Kim

CoRR, 2022

2019

Perceptron-based prefetch filtering.

Eshan Bhatia, Gino Chacon, Seth H. Pugsley, Elvira Teran, Paul V. Gratz, Daniel A. Jiménez

Proceedings of the 46th International Symposium on Computer Architecture, 2019

2018

Flexible associativity for DRAM caches.

Elvira Teran, Zeshan Chishti, Zhe Wang, Chris Wilkerson, Daniel A. Jiménez

Proceedings of the 15th ACM International Conference on Computing Frontiers, 2018

2017

Multiperspective reuse prediction.

Daniel A. Jiménez, Elvira Teran

Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, 2017

Kill the Program Counter: Reconstructing Program Behavior in the Processor Cache Hierarchy.

Jinchun Kim, Elvira Teran, Paul V. Gratz, Daniel A. Jiménez, Seth H. Pugsley, Chris Wilkerson

Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems, 2017

2016

Perceptron learning for reuse prediction.

Elvira Teran, Zhe Wang, Daniel A. Jiménez

Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016

Minimal disturbance placement and promotion.

Elvira Teran, Yingying Tian, Zhe Wang, Daniel A. Jiménez

Proceedings of the 2016 IEEE International Symposium on High Performance Computer Architecture, 2016