Elnaz Ansari
Orcid: 0000-0002-0498-8277
According to our database1,
Elnaz Ansari
authored at least 9 papers
between 2013 and 2023.
Collaborative distances:
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Bibliography
2023
Design Space Exploration and Optimization for Carbon-Efficient Extended Reality Systems.
CoRR, 2023
Proceedings of the 2nd Workshop on Sustainable Computer Systems, 2023
2022
Three-Dimensional Stacked Neural Network Accelerator Architectures for AR/VR Applications.
IEEE Micro, 2022
Co-Optimization of SRAM Circuits with Sequential Access Patterns in a 7nm SoC Achieving 58% Memory Energy Reduction for AR Applications.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
System-Level Design and Integration of a Prototype AR/VR Hardware Featuring a Custom Low-Power DNN Accelerator Chip in 7nm Technology for Codec Avatars.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2022
2018
A receiver/antenna co-design for a 1.5mJ per fix fully-integrated 10×10×6mm<sup>3</sup> GPS logger.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018
2014
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014
2013
An Ultra-Low-Power 9.8 GHz Crystal-Less UWB Transceiver With Digital Baseband Integrated in 0.18 µm BiCMOS.
IEEE J. Solid State Circuits, 2013
An ultra-low-power 9.8GHz crystal-less UWB transceiver with digital baseband integrated in 0.18µm BiCMOS.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013