Elkin Garcia

According to our database1, Elkin Garcia authored at least 15 papers between 2010 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2016
The Design and Implementation of TIDeFlow: A Dataflow-Inspired Execution Model for Parallel Loops and Task Pipelining.
Int. J. Parallel Program., 2016

2015
Energy efficient multi-level tiling for dense matrix multiplication on many-core architecture.
Proceedings of the Sixth International Green and Sustainable Computing Conference, 2015

2014
Position Paper: Locality-Driven Scheduling of Tasks for Data-Dependent Multithreading.
Proceedings of the 2014 IEEE International Parallel & Distributed Processing Symposium Workshops, 2014

2013
Optimizing the LU Factorization for Energy Efficiency on a Many-Core Architecture.
Proceedings of the Languages and Compilers for Parallel Computing, 2013

A dynamic schema to increase performance in many-core architectures through percolation operations.
Proceedings of the 20th Annual International Conference on High Performance Computing, 2013

Strategies for improving performance and energy efficiency on a many-core.
Proceedings of the Computing Frontiers Conference, 2013

2012
Toward high-throughput algorithms on many-core architectures.
ACM Trans. Archit. Code Optim., 2012

Demystifying Performance Predictions of Distributed FFT3D Implementations.
Proceedings of the Network and Parallel Computing, 9th IFIP International Conference, 2012

A Discussion in Favor of Dynamic Scheduling for Regular Applications in Many-core Architectures.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012

Dynamic percolation: a case of study on the shortcomings of traditional optimization in many-core architectures.
Proceedings of the Computing Frontiers Conference, CF'12, 2012

2011
A Reconfigurable Computing System Based on a Cache-Coherent Fabric.
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011

Polytasks: A Compressed Task Representation for HPC Runtimes.
Proceedings of the Languages and Compilers for Parallel Computing, 2011

Hardware and Software Tradeoffs for Task Synchronization on Manycore Architectures.
Proceedings of the Euro-Par 2011 Parallel Processing - 17th International Conference, 2011

2010
Locality Optimization of Stencil Applications Using Data Dependency Graphs.
Proceedings of the Languages and Compilers for Parallel Computing, 2010

Optimized Dense Matrix Multiplication on a Many-Core Architecture.
Proceedings of the Euro-Par 2010 - Parallel Processing, 16th International Euro-Par Conference, Ischia, Italy, August 31, 2010


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