Elie Maricau
According to our database1,
Elie Maricau
authored at least 18 papers
between 2008 and 2013.
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Collaborative distances:
Timeline
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2013
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Bibliography
2013
Stochastic degradation modeling and simulation for analog integrated circuits in nanometer CMOS.
Proceedings of the Design, Automation and Test in Europe, 2013
2012
Offset measurement method for accurate characterization of BTI-induced degradation in opamps.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012
Hierarchical analog circuit reliability analysis using multivariate nonlinear regression and active learning sample selection.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012
2011
IEEE J. Emerg. Sel. Topics Circuits Syst., 2011
Impact analysis of stochastic transistor aging on current-steering DACs in 32nm CMOS.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011
Transistor aging-induced degradation of analog circuits: Impact analysis and design guidelines.
Proceedings of the 37th European Solid-State Circuits Conference, 2011
Proceedings of the Design, Automation and Test in Europe, 2011
Proceedings of the Design, Automation and Test in Europe, 2011
2010
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010
Variability-aware reliability simulation of mixed-signal ICs with quasi-linear complexity.
Proceedings of the Design, Automation and Test in Europe, 2010
2009
A methodology for measuring transistor ageing effects towards accurate reliability simulation.
Proceedings of the 15th IEEE International On-Line Testing Symposium (IOLTS 2009), 2009
Panel: Realistic low power design: Let errors occur and correct them later or mitigate errors via design guardbanding and process control?.
Proceedings of the 15th IEEE International On-Line Testing Symposium (IOLTS 2009), 2009
Efficient reliability simulation of analog ICs including variability and time-varying stress.
Proceedings of the Design, Automation and Test in Europe, 2009
2008
An analytical model for hot carrier degradation in nanoscale CMOS suitable for the simulation of degradation in analog IC applications.
Microelectron. Reliab., 2008
Proceedings of the Design, Automation and Test in Europe, 2008