Elham Cheshmikhani

According to our database, Elham Cheshmikhani authored at least 15 papers between 2015 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

A Low-Cost Fault-Tolerant Racetrack Cache Based on Data Compression.

Elham Cheshmikhani, Fateme Shokouhinia, Hamed Farbeh

IEEE Trans. Circuits Syst. II Express Briefs, August, 2024

2023

IXIAM: ISA EXtension for Integrated Accelerator Management.

Biagio Peccerillo, Elham Cheshmikhani, Mirco Mannino, Andrea Mondelli, Sandro Bartolini

IEEE Access, 2023

2022

CoPA: Cold Page Awakening to Overcome Retention Failures in STT-MRAM Based I/O Buffers.

Mostafa Hadizadeh, Elham Cheshmikhani, Maysam Rahmanpour, Onur Mutlu, Hossein Asadi

IEEE Trans. Parallel Distributed Syst., 2022

3RSeT: Read Disturbance Rate Reduction in STT-MRAM Caches by Selective Tag Comparison.

Elham Cheshmikhani, Hamed Farbeh, Hossein Asadi

IEEE Trans. Computers, 2022

A General Framework for Accelerator Management Based on ISA Extension.

Elham Cheshmikhani, Biagio Peccerillo, Andrea Mondelli, Sandro Bartolini

IEEE Access, 2022

2020

A System-Level Framework for Analytical and Empirical Reliability Exploration of STT-MRAM Caches.

Elham Cheshmikhani, Hamed Farbeh, Hossein Asadi

IEEE Trans. Reliab., 2020

STAIR: High Reliable STT-MRAM Aware Multi-Level I/O Cache Architecture by Adaptive ECC Allocation.

Mostafa Hadizadeh, Elham Cheshmikhani, Hossein Asadi

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019

A-CACHE: Alternating Cache Allocation to Conduct Higher Endurance in NVM-Based Caches.

Hamed Farbeh, Amir Mahdi Hosseini Monazzah, Ensieh Aliagha, Elham Cheshmikhani

IEEE Trans. Circuits Syst. II Express Briefs, 2019

TA-LRW: A Replacement Policy for Error Rate Reduction in STT-MRAM Caches.

Elham Cheshmikhani, Hamed Farbeh, Seyed Ghassem Miremadi, Hossein Asadi

IEEE Trans. Computers, 2019

Enhancing Reliability of STT-MRAM Caches by Eliminating Read Disturbance Accumulation.

Elham Cheshmikhani, Hamed Farbeh, Hossein Asadi

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

ROBIN: incremental oblique interleaved ECC for reliability improvement in STT-MRAM caches.

Elham Cheshmikhani, Hamed Farbeh, Hossein Asadi

Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

2017

Fast Fault Tree Analysis for Hybrid Uncertainties Using Stochastic Logic Implemented on Field-Programmable Gate Arrays: An Application in Quantitative Assessment and mitigation of Welding Defects Risk.

Shahab Shoar, Hamid R. Zarandi, Farnad Nasirzadeh, Elham Cheshmikhani

Qual. Reliab. Eng. Int., 2017

2016

Accelerating Dynamic Fault Tree Analysis Based on Stochastic Logic Utilizing GPGPUs.

Elham Cheshmikhani, Hamid R. Zarandi

Proceedings of the 24th Euromicro International Conference on Parallel, 2016

Investigating the Effects of Process Variations and System Workloads on Reliability of STT-RAM Caches.

Elham Cheshmikhani, Amir Mahdi Hosseini Monazzah, Hamed Farbeh, Seyed Ghassem Miremadi

Proceedings of the 12th European Dependable Computing Conference, 2016

2015

Probabilistic analysis of dynamic and temporal fault trees using accurate stochastic logic gates.

Elham Cheshmikhani, Hamid R. Zarandi

Microelectron. Reliab., 2015