Elaheh Sadredini

Orcid: 0000-0002-5834-4346

According to our database1, Elaheh Sadredini authored at least 30 papers between 2016 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2023
MAGIC-DHT: Fast in-memory computing for Discrete Hadamard Transform.
Integr., November, 2023

Sparsity Controllable Hyperdimensional Computing for Genome Sequence Matching Acceleration.
Proceedings of the 31st IFIP/IEEE International Conference on Very Large Scale Integration, 2023

BP-NTT: Fast and Compact in-SRAM Number Theoretic Transform with Bit-Parallel Modular Multiplication.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022
Sealer: In-SRAM AES for High-Performance and Low-Overhead Memory Encryption.
Proceedings of the ISLPED '22: ACM/IEEE International Symposium on Low Power Electronics and Design, Boston, MA, USA, August 1, 2022

BioHD: an efficient genome sequence search platform using HyperDimensional memorization.
Proceedings of the ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18, 2022

Full Stack Parallel Online Hyperdimensional Regression on FPGA.
Proceedings of the IEEE 40th International Conference on Computer Design, 2022

Inhale: Enabling High-Performance and Energy-Efficient In-SRAM Cryptographic Hash for IoT.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

Neural computation for robust and holographic face detection.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021
Sunder: Enabling Low-Overhead and Scalable Near-Data Pattern Matching Acceleration.
Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021

Cognitive Correlative Encoding for Genome Sequence Matching in Hyperdimensional System.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020
Enabling In-SRAM Pattern Processing With Low-Overhead Reporting Architecture.
IEEE Comput. Archit. Lett., 2020

Impala: Algorithm/Architecture Co-Design for In-Memory Multi-Stride Pattern Matching.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020

Fulcrum: A Simplified Control and Access Mechanism Toward Flexible and Practical In-Situ Accelerators.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020

Grapefruit: An Open-Source, Full-Stack, and Customizable Automata Processing on FPGAs.
Proceedings of the 28th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2020

FlexAmata: A Universal and Efficient Adaption of Applications to Spatial Automata Processing Accelerators.
Proceedings of the ASPLOS '20: Architectural Support for Programming Languages and Operating Systems, 2020

2019
A Scalable and Efficient In-Memory Interconnect Architecture for Automata Processing.
IEEE Comput. Archit. Lett., 2019

eAP: A Scalable and Efficient In-Memory Accelerator for Automata Processing.
Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

An Overflow-free Quantized Memory Hierarchy in General-purpose Processors.
Proceedings of the IEEE International Symposium on Workload Characterization, 2019

2018
Hierarchical Pattern Mining with the Automata Processor.
Int. J. Parallel Program., 2018

ASPEN: A Scalable In-SRAM Architecture for Pushdown Automata.
Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018

A Scalable Solution for Rule-Based Part-of-Speech Tagging on Novel Hardware Accelerators.
Proceedings of the 24th ACM SIGKDD International Conference on Knowledge Discovery & Data Mining, 2018

AutomataZoo: A Modern Automata Processing Benchmark Suite.
Proceedings of the 2018 IEEE International Symposium on Workload Characterization, 2018

Searching for Potential gRNA Off-Target Sites for CRISPR/Cas9 Using Automata Processing Across Different Platforms.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2018

2017
Test Generation and Scheduling for a Hybrid BIST Considering Test Time and Power Constraint.
CoRR, 2017

BILBO-friendly Hybrid BIST Architecture with Asymmetric Polynomial Reseeding.
CoRR, 2017

Frequent subtree mining on the automata processor: challenges and opportunities.
Proceedings of the International Conference on Supercomputing, 2017

2016
ANMLzoo: a benchmark suite for exploring bottlenecks in automata processing engines and architectures.
Proceedings of the 2016 IEEE International Symposium on Workload Characterization, 2016

An improved scheme for pre-computed patterns in core-based SoC architecture.
Proceedings of the 2016 IEEE East-West Design & Test Symposium, 2016

An overview of micron's automata processor.
Proceedings of the Eleventh IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2016

Sequential pattern mining with the Micron automata processor.
Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016


  Loading...