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Eknath Sarkar

According to our database1, Eknath Sarkar authored at least 2 papers between 2023 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
On the Reliability of High-Performance Dual Gate (DG) W-Doped In2O3 FET.
[BibTeX]
[DOI]
Khandker Akif Aabrar
,
Hyeonwoo Park
,
Sharadindu Gopal Kirtania
,
Eknath Sarkar
,
Md Abdullah Al Mamun
,
Sunbin Deng
,
Chengyang Zhang
,
Gilbert B. Rayner
,
Kyeongjae Cho
,
Suman Datta
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2023
First Demonstration of a-IGZO GAA Nanosheet FETs Featuring Achievable SS=61mV/dec, Ioff<10<sup>-7</sup> μA/μm, DIBL =44mV/V, Positive VT, and Process Temp. of 300 °C.
[BibTeX]
[DOI]
Jih-Chao Chiu
,
Eknath Sarkar
,
Yuan-Ming Liu
,
Yu-Ciao Chen
,
Yu-Cheng Fan
,
C. W. Liu
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023


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