Eiji Yoshiya

According to our database, Eiji Yoshiya authored at least 2 papers between 2021 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2022

Design Verification Methodology of Pipelined RISC-V Processor Using C2RTL Framework.

Eiji Yoshiya, Tomoya Nakanishi, Tsuyoshi Isshiki

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2022

2021

RTL Design Framework for Embedded Processor by using C++ Description.

Eiji Yoshiya, Tomoya Nakanishi, Tsuyoshi Isshiki

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021