Efstratios Zacharelos

Orcid: 0000-0002-7334-2250

According to our database1, Efstratios Zacharelos authored at least 11 papers between 2019 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

On csauthors.net:

Bibliography

2024
Approximate Full-Adders: A Comprehensive Analysis.
IEEE Access, 2024

Comprehensive Analysis of Input Order Invariant Approximate 4-2 Compressors for Binary Multipliers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2023
Approximate squaring circuits exploiting recursive architectures.
Integr., 2023

On-Chip Spike Detection and Classification using Neural Networks and Approximate Computing.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2023

2022
Approximate Recursive Multipliers Using Low Power Building Blocks.
IEEE Trans. Emerg. Top. Comput., 2022

Enabling Fine Sample Rate Settings in DSOs with Time-Interleaved ADCs.
Sensors, 2022

Low Power Spike Detector for Brain-Silicon Interface using Differential Amplitude Slope Operator.
Proceedings of the 17th Conference on Ph.D Research in Microelectronics and Electronics, 2022

Approximate Recursive Multipliers Using Carry Truncation and Error Compensation.
Proceedings of the 17th Conference on Ph.D Research in Microelectronics and Electronics, 2022

2021
Real-Time Downsampling in Digital Storage Oscilloscopes With Multichannel Architectures.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

2020
Digital Circuit for Seamless Resampling ADC Output Streams.
Sensors, 2020

2019
Digital Circuit for the Arbitrary Selection of Sample Rate in Digital Storage Oscilloscopes.
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2019


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