Edwin W. Greeneich

According to our database, Edwin W. Greeneich authored at least 4 papers between 1988 and 2002.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2002

CMOS Delay and Power Model Equations for Simultaneous Transistor and Interconnect Wire Analysis and Optimization.

Sangho Lee, Edwin W. Greeneich

VLSI Design, 2002

CMOS auto-ranging PLL for low-voltage wideband systems.

Yi-Cheng Chang, Edwin W. Greeneich

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

1999

A current-controlled oscillator coarse-steering acquisition-aid for high frequency SOI CMOS PLL circuits.

Yi-Chang, Edwin W. Greeneich

Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

1988

Analysis and characterization of BiCMOS for high-speed digital logic.

Edwin W. Greeneich, Kevin L. McLaughlin

IEEE J. Solid State Circuits, April, 1988