Edward W. Thompson

According to our database1, Edward W. Thompson authored at least 11 papers between 1970 and 1980.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

1980
An accurate functional level concurrent fault simulator.
Proceedings of the 17th Design Automation Conference, 1980

The incorporation of functional level element routines into an existing digital simulation system.
Proceedings of the 17th Design Automation Conference, 1980

1976
Modeling and Digital Simulation for Design Verification and Diagnosis.
IEEE Trans. Computers, 1976

Bridges: a tool for increasing the reliability of references to Fortran variables.
ACM SIGPLAN Notices, 1976

1975
Digital Logic Simulation in a Time-Based, Table-Driven Environment.
Computer, 1975

Three levels of accuracy for the simulation of different fault types in digital systems.
Proceedings of the 12th Design Automation Conference, 1975

The software engineering technique of data hiding as applied to multi-level model implementation of logical devices in digital simulation.
Proceedings of the 12th Design Automation Conference, 1975

A module interface specification language.
Proceedings of the 12th Design Automation Conference, 1975

1974
Timing analysis for digital fault simulation using assignable delays.
Proceedings of the 11th Design Automation Workshop, 1974

1972
Fault insertion techniques and models for digital logic simulation.
Proceedings of the American Federation of Information Processing Societies: Proceedings of the AFIPS '72 Fall Joint Computer Conference, December 5-7, 1972, Anaheim, California, USA, 1972

1970
A model and implementation of a universal time delay simulator for large digital nets.
Proceedings of the American Federation of Information Processing Societies: AFIPS Conference Proceedings: 1970 Spring Joint Computer Conference, 1970


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