Edward J. McCluskey

According to our database, Edward J. McCluskey authored at least 212 papers between 1957 and 2016.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2016

State of the Journal.

Paolo Montuschi, Edward J. McCluskey, Samarjit Chakraborty, Jason Cong, Ramón M. Rodríguez-Dagnino, Fred Douglis, Lieven Eeckhout, Gernot Heiser, Sushil Jajodia, Ruby B. Lee, Dinesh Manocha, Tomás F. Pena, Isabelle Puaut, Hanan Samet, Donatella Sciuto

IEEE Trans. Computers, 2016

2010

Test Set Compression Through Alternation Between Deterministic and Pseudorandom Test Patterns.

Ahmad A. Al-Yamani, Edward J. McCluskey

J. Electron. Test., 2010

2008

Inconsistent Fail due to Limited Tester Timing Accuracy.

Intaik Park, Donghwi Lee, Erik Chmelar, Edward J. McCluskey

Proceedings of the 26th IEEE VLSI Test Symposium (VTS 2008), April 27, 2008

Error Sequence Analysis.

Jaekwang Lee, Intaik Park, Edward J. McCluskey

Proceedings of the 26th IEEE VLSI Test Symposium (VTS 2008), April 27, 2008

How Many Test Patterns are Useless?

François-Fabien Ferhani, Nirmal R. Saxena, Edward J. McCluskey, Phil Nigh

Proceedings of the 26th IEEE VLSI Test Symposium (VTS 2008), April 27, 2008

Launch-on-Shift-Capture Transition Tests.

Intaik Park, Edward J. McCluskey

Proceedings of the 2008 IEEE International Test Conference, 2008

Failing Frequency Signature Analysis.

Jaekwang Lee, Edward J. McCluskey

Proceedings of the 2008 IEEE International Test Conference, 2008

2007

Test Set Reordering Using the Gate Exhaustive Test Metric.

Kyoung Youn Cho, Edward J. McCluskey

Proceedings of the 25th IEEE VLSI Test Symposium (VTS 2007), 2007

California scan architecture for high quality and low power testing.

Kyoung Youn Cho, Subhasish Mitra, Edward J. McCluskey

Proceedings of the 2007 IEEE International Test Conference, 2007

2006

Session Abstract.

Erik Chmelar, Edward J. McCluskey

Proceedings of the 24th IEEE VLSI Test Symposium (VTS 2006), 30 April, 2006

Classifying Bad Chips and Ordering Test Sets.

François-Fabien Ferhani, Edward J. McCluskey

Proceedings of the 2006 IEEE International Test Conference, 2006

2005

Test chip experimental results on high-level structural test.

Ahmad A. Al-Yamani, Edward J. McCluskey

ACM Trans. Design Autom. Electr. Syst., 2005

Diagnosis of resistive-open and stuck-open defects in digital CMOS ICs.

Chien-Mo James Li, Edward J. McCluskey

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005

Optimized reseeding by seed ordering and encoding.

Ahmad A. Al-Yamani, Subhasish Mitra, Edward J. McCluskey

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005

Effective TARO Pattern Generation.

Intaik Park, Ahmad A. Al-Yamani, Edward J. McCluskey

Proceedings of the 23rd IEEE VLSI Test Symposium (VTS 2005), 2005

Gate exhaustive testing.

Kyoung Youn Cho, Subhasish Mitra, Edward J. McCluskey

Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005

BIST-Guided ATPG.

Ahmad A. Al-Yamani, Edward J. McCluskey

Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005

2004

Efficient Design Diversity Estimation for Combinational Circuits.

Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey

IEEE Trans. Computers, 2004

Reconfigurable Architecture for Autonomous Self-Repair.

Subhasish Mitra, Wei-Je Huang, Nirmal R. Saxena, Shu-Yi Yu, Edward J. McCluskey

IEEE Des. Test Comput., 2004

A Multi-Configuration Strategy for an Application Dependent Testing of FPGAs.

Mehdi Baradaran Tahoori, Edward J. McCluskey, Michel Renovell, Philippe Faure

Proceedings of the 22nd IEEE VLSI Test Symposium (VTS 2004), 2004

Delay Defect Screening using Process Monitor Structures.

Subhasish Mitra, Erik H. Volkerink, Edward J. McCluskey, Stefan Eichenberger

Proceedings of the 22nd IEEE VLSI Test Symposium (VTS 2004), 2004

ELF-Murphy Data on Defects and Test Sets.

Edward J. McCluskey, Ahmad A. Al-Yamani, Chien-Mo James Li, Chao-Wen Tseng, Erik H. Volkerink, François-Fabien Ferhani, Edward Li, Subhasish Mitra

Proceedings of the 22nd IEEE VLSI Test Symposium (VTS 2004), 2004

Speed Clustering of Integrated Circuits.

Kenneth A. Brand, Erik H. Volkerink, Edward J. McCluskey, Subhasish Mitra

Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

Test quality for high level structural test.

Ahmad A. Al-Yamani, Edward J. McCluskey

Proceedings of the Ninth IEEE International High-Level Design Validation and Test Workshop 2004, 2004

2003

Bist Reseeding with very few Seeds.

Ahmad A. Al-Yamani, Subhasish Mitra, Edward J. McCluskey

Proceedings of the 21st IEEE VLSI Test Symposium (VTS 2003), 27 April, 2003

Built-In Reseeding for Serial Bist.

Ahmad A. Al-Yamani, Edward J. McCluskey

Proceedings of the 21st IEEE VLSI Test Symposium (VTS 2003), 27 April, 2003

Seed encoding with LFSRs and cellular automata.

Ahmad A. Al-Yamani, Edward J. McCluskey

Proceedings of the 40th Design Automation Conference, 2003

2002

Control-flow checking by software signatures.

Nahmsuk Oh, Philip P. Shirvani, Edward J. McCluskey

IEEE Trans. Reliab., 2002

Error detection by duplicated instructions in super-scalar processors.

Nahmsuk Oh, Philip P. Shirvani, Edward J. McCluskey

IEEE Trans. Reliab., 2002

Error detection by selective procedure call duplication for low energy consumption.

Nahmsuk Oh, Edward J. McCluskey

IEEE Trans. Reliab., 2002

ED4I: Error Detection by Diverse Data and Duplicated Instructions.

Nahmsuk Oh, Subhasish Mitra, Edward J. McCluskey

IEEE Trans. Computers, 2002

A Design Diversity Metric and Analysis of Redundant Systems.

Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey

IEEE Trans. Computers, 2002

Experimental Results for Slow-Speed Testing.

Chao-Wen Tseng, James Li, Edward J. McCluskey

Proceedings of the 20th IEEE VLSI Test Symposium (VTS 2002), Without Testing It's a Gamble, 28 April, 2002

Design for Testability and Testing of IEEE 1149.1 Tap Controller.

Subhasish Mitra, Edward J. McCluskey, Samy Makar

Proceedings of the 20th IEEE VLSI Test Symposium (VTS 2002), Without Testing It's a Gamble, 28 April, 2002

Debating the Future of Burn-In.

Edward J. McCluskey, Subhasish Mitra, Bob Madge, Peter C. Maxwell, Phil Nigh, Mike Rodgers

Proceedings of the 20th IEEE VLSI Test Symposium (VTS 2002), Without Testing It's a Gamble, 28 April, 2002

Diagnosis of Sequence-Dependent Chips.

Chien-Mo James Li, Edward J. McCluskey

Proceedings of the 20th IEEE VLSI Test Symposium (VTS 2002), Without Testing It's a Gamble, 28 April, 2002

Fault Grading FPGA Interconnect Test Configurations.

Mehdi Baradaran Tahoori, Subhasish Mitra, Shahin Toutounchi, Edward J. McCluskey

Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

Dependable Reconfigurable Computing Design Diversity and Self Repair.

Subhasish Mitra, Edward J. McCluskey

Proceedings of the 4th NASA / DoD Workshop on Evolvable Hardware (EH 2002), 2002

Testing Digital Circuits with Constraints.

Ahmad A. Al-Yamani, Subhasish Mitra, Edward J. McCluskey

Proceedings of the 17th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2002), 2002

2001

Bit-fixing in pseudorandom sequences for scan BIST.

Nur A. Touba, Edward J. McCluskey

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001

An Evaluation of Pseudo Random Testing for Detecting Real Defects.

Chao-Wen Tseng, Subhasish Mitra, Edward J. McCluskey, Scott Davidson

Proceedings of the 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April, 2001

MINVDD Testing for Weak CMOS ICs.

Chao-Wen Tseng, Ray Chen, Edward J. McCluskey, Phil Nigh

Proceedings of the 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April, 2001

Design of Redundant Systems Protected Against Common-Mode Failures.

Subhasish Mitra, Edward J. McCluskey

Proceedings of the 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April, 2001

Design Diversity for Concurrent Error Detection in Sequential Logic Circuts.

Subhasish Mitra, Edward J. McCluskey

Proceedings of the 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April, 2001

Diagnosis of Tunneling Opens.

Chien-Mo James Li, Edward J. McCluskey

Proceedings of the 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April, 2001

On-line testing and recovery in TMR systems for real-time applications.

Shu-Yi Yu, Edward J. McCluskey

Proceedings of the Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October, 2001

Multiple-output propagation transition fault test.

Chao-Wen Tseng, Edward J. McCluskey

Proceedings of the Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October, 2001

Testing for resistive opens and stuck opens.

Chao-Wen Tseng, Chien-Mo James Li, Mike Purtell, Edward J. McCluskey

Proceedings of the Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October, 2001

Diversity Techniques for Concurrent Error Detection.

Subhasish Mitra, Edward J. McCluskey

Proceedings of the 2nd International Symposium on Quality of Electronic Design (ISQED 2001), 2001

A memory coherence technique for online transient error recovery of FPGA configurations.

Wei-Je Huang, Edward J. McCluskey

Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2001

Column-Based Precompiled Configuration Techniques for FPGA.

Wei-Je Huang, Edward J. McCluskey

Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2001

Techniques for Estimation of Design Diversity for Combinational Logic Circuits.

Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey

Proceedings of the 2001 International Conference on Dependable Systems and Networks (DSN 2001) (formerly: FTCS), 2001

Permanent Fault Repair for FPGAs with Limited Redundant Area.

Shu-Yi Yu, Edward J. McCluskey

Proceedings of the 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2001), 2001

Procedure Call Duplication: Minimization of Energy Consumption with Constrained Error Detection Latency.

Nahmsuk Oh, Edward J. McCluskey

Proceedings of the 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2001), 2001

Fast Run-Time Fault Location in Dependable FPGA-Based Applications.

Wei-Je Huang, Subhasish Mitra, Edward J. McCluskey

Proceedings of the 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2001), 2001

Performance Evaluation of Checksum-Based ABFT.

Ahmad A. Al-Yamani, Nahmsuk Oh, Edward J. McCluskey

Proceedings of the 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2001), 2001

2000

Software-implemented EDAC protection against SEUs.

Philip P. Shirvani, Nirmal R. Saxena, Edward J. McCluskey

IEEE Trans. Reliab., 2000

Common-mode failures in redundant VLSI systems: a survey.

Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey

IEEE Trans. Reliab., 2000

Dependable Computing and Online Testing in Adaptive and Configurable Systems.

Nirmal R. Saxena, Santiago Fernández-Gomez, Wei-Je Huang, Subhasish Mitra, Shu-Yi Yu, Edward J. McCluskey

IEEE Des. Test Comput., 2000

Efficient Multiplexer Synthesis Techniques.

Subhasish Mitra, LaNae J. Avra, Edward J. McCluskey

IEEE Des. Test Comput., 2000

Cold Delay Defect Screening.

Chao-Wen Tseng, Edward J. McCluskey, Xiaoping Shao, David M. Wu

Proceedings of the 18th IEEE VLSI Test Symposium (VTS 2000), 30 April, 2000

Fault Escapes in Duplex Systems.

Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey

Proceedings of the 18th IEEE VLSI Test Symposium (VTS 2000), 30 April, 2000

Word Voter: A New Voter Design for Triple Modular Redundant Systems.

Subhasish Mitra, Edward J. McCluskey

Proceedings of the 18th IEEE VLSI Test Symposium (VTS 2000), 30 April, 2000

Transient errors and rollback recovery in LZ compression.

Wei-Je Huang, Edward J. McCluskey

Proceedings of the 2000 Pacific Rim International Symposium on Dependable Computing (PRDC 2000), 2000

Which concurrent error detection scheme to choose ?

Subhasish Mitra, Edward J. McCluskey

Proceedings of the Proceedings IEEE International Test Conference 2000, 2000

Combinational logic synthesis for diversity in duplex systems.

Subhasish Mitra, Edward J. McCluskey

Proceedings of the Proceedings IEEE International Test Conference 2000, 2000

Stuck-fault tests vs. actual defects.

Edward J. McCluskey, Chao-Wen Tseng

Proceedings of the Proceedings IEEE International Test Conference 2000, 2000

Testing for tunneling opens.

Chien-Mo James Li, Edward J. McCluskey

Proceedings of the Proceedings IEEE International Test Conference 2000, 2000

An ACS Robotic Control Algorithm with Fault Tolerant Capabilities.

Shu-Yi Yu, Nirmal R. Saxena, Edward J. McCluskey

Proceedings of the 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), 2000

A Reliable LZ Data Compressor on Reconfigurable Coprocessors.

Wei-Je Huang, Nirmal R. Saxena, Edward J. McCluskey

Proceedings of the 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), 2000

1999

RP-SYN: synthesis of random pattern testable circuits with test point insertion.

Nur A. Touba, Edward J. McCluskey

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

An output encoding problem and a solution technique.

Subhasish Mitra, LaNae J. Avra, Edward J. McCluskey

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

PADded Cache: A New Fault-Tolerance Technique for Cache Memories.

Philip P. Shirvani, Edward J. McCluskey

Proceedings of the 17th IEEE VLSI Test Symposium (VTS '99), 1999

Finite state machine synthesis with concurrent error detection.

Chaohuang Zeng, Nirmal R. Saxena, Edward J. McCluskey

Proceedings of the Proceedings IEEE International Test Conference 1999, 1999

A design diversity metric and reliability analysis for redundant systems.

Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey

Proceedings of the Proceedings IEEE International Test Conference 1999, 1999

1998

Experimental Results for IDDQ and VLV Testing.

Jonathan T.-Y. Chang, Chao-Wen Tseng, Yi-Chin Chu, Sanjay Wattal, Mike Purtell, Edward J. McCluskey

Proceedings of the 16th IEEE VLSI Test Symposium (VTS '98), 28 April, 1998

Dependable adaptive computing systems-the ROAR project.

Nirmal R. Saxena, Edward J. McCluskey

Proceedings of the IEEE International Conference on Systems, Man and Cybernetics, 1998

Analysis of pattern-dependent and timing-dependent failures in an experimental test chip.

Jonathan T.-Y. Chang, Chao-Wen Tseng, Chien-Mo James Li, Mike Purtell, Edward J. McCluskey

Proceedings of the Proceedings IEEE International Test Conference 1998, 1998

Detecting resistive shorts for CMOS domino circuits.

Jonathan T.-Y. Chang, Edward J. McCluskey

Proceedings of the Proceedings IEEE International Test Conference 1998, 1998

1997

Logic synthesis of multilevel circuits with concurrent error detection.

Nur A. Touba, Edward J. McCluskey

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997

Parallel Signatur Analysis Design with Bounds on Aliasing.

Nirmal R. Saxena, Edward J. McCluskey

IEEE Trans. Computers, 1997

High-Level Synthesis for Orthogonal Sca.

Robert B. Norwood, Edward J. McCluskey

Proceedings of the 15th IEEE VLSI Test Symposium (VTS'97), 1997

ATPG for scan chain latches and flip-flops.

Samy Makar, Edward J. McCluskey

Proceedings of the 15th IEEE VLSI Test Symposium (VTS'97), 1997

SHOrt voltage elevation (SHOVE) test for weak CMOS ICs.

Jonathan T.-Y. Chang, Edward J. McCluskey

Proceedings of the 15th IEEE VLSI Test Symposium (VTS'97), 1997

Scan Synthesis for One-Hot Signals.

Subhasish Mitra, LaNae J. Avra, Edward J. McCluskey

Proceedings of the Proceedings IEEE International Test Conference 1997, 1997

Pseudo-Random Pattern Testing of Bridging Faults.

Nur A. Touba, Edward J. McCluskey

Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997

1996

Counting Two-State Transition-Tour Sequences.

Nirmal R. Saxena, Edward J. McCluskey

IEEE Trans. Computers, 1996

Applying two-pattern tests using scan-mapping.

Nur A. Touba, Edward J. McCluskey

Proceedings of the 14th IEEE VLSI Test Symposium (VTS'96), April 28, 1996

Test point insertion based on path tracing.

Nur A. Touba, Edward J. McCluskey

Proceedings of the 14th IEEE VLSI Test Symposium (VTS'96), April 28, 1996

Synthesis-for-scan and scan chain ordering.

Robert B. Norwood, Edward J. McCluskey

Proceedings of the 14th IEEE VLSI Test Symposium (VTS'96), April 28, 1996

Quantitative analysis of very-low-voltage testing.

Jonathan T.-Y. Chang, Edward J. McCluskey

Proceedings of the 14th IEEE VLSI Test Symposium (VTS'96), April 28, 1996

Altering a Pseudo-Random Bit Sequence for Scan-Based BIST.

Nur A. Touba, Edward J. McCluskey

Proceedings of the Proceedings IEEE International Test Conference 1996, 1996

Orthogonal Scan: Low-Overhead Scan for Data Paths.

Robert B. Norwood, Edward J. McCluskey

Proceedings of the Proceedings IEEE International Test Conference 1996, 1996

Analysis and Detection of Timing Failures in an Experimental Test Chip.

Piero Franco, Siyad C. Ma, Jonathan Chang, Yi-Chin Chu, Sanjay Wattal, Edward J. McCluskey, Robert L. Stokes, William D. Farwell

Proceedings of the Proceedings IEEE International Test Conference 1996, 1996

Detecting Delay Flaws by Very-Low-Voltage Testing.

Jonathan T.-Y. Chang, Edward J. McCluskey

Proceedings of the Proceedings IEEE International Test Conference 1996, 1996

1995

Open faults in BiCMOS gates.

Siyad C. Ma, Edward J. McCluskey

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995

Floating Point Fault Tolerance with Backward Error Assertions.

Daniel Boley, Gene H. Golub, Samy Makar, Nirmal R. Saxena, Edward J. McCluskey

IEEE Trans. Computers, 1995

Design of Autonomous TPG Circuits for Use in Two-Pattern Testing.

Kiyoshi Furuya, Seiji Seki, Edward J. McCluskey

IEICE Trans. Inf. Syst., 1995

Transformed pseudo-random patterns for BIST.

Nur A. Touba, Edward J. McCluskey

Proceedings of the 13th IEEE VLSI Test Symposium (VTS'95), April 30, 1995

An apparatus for pseudo-deterministic testing.

Shridhar K. Mukund, Edward J. McCluskey, T. R. N. Rao

Proceedings of the 13th IEEE VLSI Test Symposium (VTS'95), April 30, 1995

Checking experiments to test latches.

Samy Makar, Edward J. McCluskey

Proceedings of the 13th IEEE VLSI Test Symposium (VTS'95), April 30, 1995

Synthesis of Mapping Logic for Generating Transformed Pseudo-Random Patterns for BIST.

Nur A. Touba, Edward J. McCluskey

Proceedings of the Proceedings IEEE International Test Conference 1995, 1995

Functional Tests for Scan Chain Latches.

Samy Makar, Edward J. McCluskey

Proceedings of the Proceedings IEEE International Test Conference 1995, 1995

An Experimental Chip to Evaluate Test Techniques: Experiment Results.

Siyad C. Ma, Piero Franco, Edward J. McCluskey

Proceedings of the Proceedings IEEE International Test Conference 1995, 1995

An Experimental Chip to Evaluate Test Techniques: Chip and Experiment Design.

Piero Franco, William D. Farwell, Robert L. Stokes, Edward J. McCluskey

Proceedings of the Proceedings IEEE International Test Conference 1995, 1995

A simple technique for locating gate-level faults in combinational circuits.

Teruhiko Yamada, Koji Yamazaki, Edward J. McCluskey

Proceedings of the 4th Asian Test Symposium (ATS '95), 1995

1994

Linear Complexity Assertions for Sorting.

Nirmal R. Saxena, Edward J. McCluskey

IEEE Trans. Software Eng., 1994

Three-pattern tests for delay faults.

Piero Franco, Edward J. McCluskey

Proceedings of the 12th IEEE VLSI Test Symposium (VTS'94), 1994

On-line delay testing of digital circuits.

Piero Franco, Edward J. McCluskey

Proceedings of the 12th IEEE VLSI Test Symposium (VTS'94), 1994

Automated Logic Synthesis of Random-Pattern-Testable Circuits.

Nur A. Touba, Edward J. McCluskey

Proceedings of the Proceedings IEEE International Test Conference 1994, 1994

Logic synthesis techniques for reduced area implementation of multilevel circuits with concurrent error detection.

Nur A. Touba, Edward J. McCluskey

Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

1993

Analysis of Gate Oxide Shorts in CMOS Circuits.

Hong Hao, Edward J. McCluskey

IEEE Trans. Computers, 1993

Quality and Single-Stuck Faults.

Edward J. McCluskey

Proceedings of the Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics, 1993

Very-Low-Voltage Testing for Weak CMOS Logic ICs.

Hong Hao, Edward J. McCluskey

Proceedings of the Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics, 1993

Synthesizing for Scan Dependence in Built-In Self-Testable Desings.

LaNae J. Avra, Edward J. McCluskey

Proceedings of the Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics, 1993

1992

Simple Bounds on Serial Signature Analysis Aliasing for Random Testing.

Nirmal R. Saxena, Piero Franco, Edward J. McCluskey

IEEE Trans. Computers, 1992

Non-Conventional Faults in BiCMOS Digital Circuits.

Siyad C. Ma, Edward J. McCluskey

Proceedings of the Proceedings IEEE International Test Conference 1992, 1992

1991

Refined Bounds on Signature Analysis Aliasing for Random Testing.

Nirmal R. Saxena, Piero Franco, Edward J. McCluskey

Proceedings of the Proceedings IEEE International Test Conference 1991, 1991

"Resistive Shorts" Within CMOS Gates.

Hong Hao, Edward J. McCluskey

Proceedings of the Proceedings IEEE International Test Conference 1991, 1991

Two-Pattern Test Capabilities of Autonomous TPG Circuits.

Kiyoshi Furuya, Edward J. McCluskey

Proceedings of the Proceedings IEEE International Test Conference 1991, 1991

Delay Testing of Digital Circuits by Output Waveform Analysis.

Piero Franco, Edward J. McCluskey

Proceedings of the Proceedings IEEE International Test Conference 1991, 1991

Bounds on Signature Analysis Aliasing for Random Testing.

Nirmal R. Saxena, Piero Franco, Edward J. McCluskey

Proceedings of the 1991 International Symposium on Fault-Tolerant Computing, 1991

Bridging, Transition, and Stuck-Open Faults in Self-Testing CMOS Checkers.

Steven D. Millman, Edward J. McCluskey

Proceedings of the 1991 International Symposium on Fault-Tolerant Computing, 1991

1990

Analysis of Checksums, Extended-Precision Checksums, and Cyclic Redundancy Checks.

Nirmal R. Saxena, Edward J. McCluskey

IEEE Trans. Computers, 1990

Control-Flow Checking Using Watchdog Assists and Extended-Precision Checksums.

Nirmal R. Saxena, Edward J. McCluskey

IEEE Trans. Computers, 1990

Design Techniques for Testable Embedded Error Checkers.

Edward J. McCluskey

Computer, 1990

Diagnosing CMOS bridging faults with stuck-at fault dictionaries.

Steven D. Millman, Edward J. McCluskey, John M. Acken

Proceedings of the Proceedings IEEE International Test Conference 1990, 1990

Behavioral synthesis of testable systems with VHDL.

LaNae J. Avra, Edward J. McCluskey

Proceedings of the Intellectual Leverage: Thirty-Fifth IEEE Computer Society International Conference, 1990

1989

Arithmetic and galois checksums.

Nirmal R. Saxena, Edward J. McCluskey

Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989

The critical path for multiple faults.

Samy Makar, Edward J. McCluskey

Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989

Pseudo-exhaustive test and segmentation: formal definitions and extended fault coverage results.

Jon G. Jr. Udell, Edward J. McCluskey

Proceedings of the Nineteenth International Symposium on Fault-Tolerant Computing, 1989

1988

Circuits for pseudoexhaustive test pattern generation.

Laung-Terng Wang, Edward J. McCluskey

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988

Hybrid designs generating maximum-length sequences.

Laung-Terng Wang, Edward J. McCluskey

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988

Probability models for pseudorandom test sequences.

Edward J. McCluskey, Samy Makar, Samiha Mourad, Kenneth D. Wagner

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988

Design of large embedded CMOS PLAs for built-in self-test.

Dick L. Liu, Edward J. McCluskey

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988

Linear Feedback Shift Register Design Using Cyclic Codes.

Laung-Terng Wang, Edward J. McCluskey

IEEE Trans. Computers, 1988

Concurrent Error Detection Using Watchdog Processors - A Survey.

Aamer Mahmood, Edward J. McCluskey

IEEE Trans. Computers, 1988

Partial Hardware Partitioning: A New Pseudo-Exhaustive Test Implementation.

Jon G. Udeli Jr., Edward J. McCluskey

Proceedings of the Proceedings International Test Conference 1988, 1988

On Benchmarking Digital Testing Systems.

Samiha Mourad, Edward J. McCluskey

Proceedings of the Proceedings International Test Conference 1988, 1988

Detecting Bridging Faults with Stuck-at Test Sets.

Steven D. Millman, Edward J. McCluskey

Proceedings of the Proceedings International Test Conference 1988, 1988

IC Quality and Test Transparency.

Edward J. McCluskey, Fred Buelow

Proceedings of the Proceedings International Test Conference 1988, 1988

Practice and Theory.

Edward J. McCluskey

Proceedings of the Proceedings International Test Conference 1988, 1988

On the Testing of Multiplexers.

Samy Makar, Edward J. McCluskey

Proceedings of the Proceedings International Test Conference 1988, 1988

Multiple stuck-at fault testability of self-testing checkers.

Takashi Nanya, Samiha Mourad, Edward J. McCluskey

Proceedings of the Eighteenth International Symposium on Fault-Tolerant Computing, 1988

1987

Pseudorandom Testing.

Kenneth D. Wagner, Cary K. Chin, Edward J. McCluskey

IEEE Trans. Computers, 1987

Test Length for Pseudorandom Testing.

Cary K. Chin, Edward J. McCluskey

IEEE Trans. Computers, 1987

Designing CMOS Circuits for Switch-Level Testability.

Dick L. Liu, Edward J. McCluskey

IEEE Des. Test, 1987

Modeling the Effect of Chip Failures on Cache Memory Systems.

Hassanein H. Amer, Edward J. McCluskey

Proceedings of the Third International Conference on Data Engineering, 1987

1986

Condensed Linear Feedback Shift Register (LFSR) Testing - A Pseudoexhaustive Test Technique.

Laung-Terng Wang, Edward J. McCluskey

IEEE Trans. Computers, 1986

Lower Overhead Design for Testability of Programmable Logic Arrays.

Saied Bozorgui-Nesbat, Edward J. McCluskey

IEEE Trans. Computers, 1986

A Hybrid Design of Maximum-Length Sequence Generators.

Laung-Terng Wang, Edward J. McCluskey

Proceedings of the Proceedings International Test Conference 1986, 1986

Circuits for Pseudo-Exhaustive Test Pattern Generation.

Laung-Terng Wang, Edward J. McCluskey

Proceedings of the Proceedings International Test Conference 1986, 1986

Multiple Stuck-At Fault Coverage of Single Stuck-At Fault Test Sets.

Joseph L. A. Hughes, Edward J. McCluskey

Proceedings of the Proceedings International Test Conference 1986, 1986

Two CMOS Metastability Sensors.

Greg G. Freeman, Dick L. Liu, Bruce A. Wooley, Edward J. McCluskey

Proceedings of the Proceedings International Test Conference 1986, 1986

An Experiment on Intermittent-Failure Mechanisms.

Mario Lúcio Côrtes, Edward J. McCluskey

Proceedings of the Proceedings International Test Conference 1986, 1986

Stuck-At Fault Detection in Parity Trees.

Samiha Mourad, Joseph L. A. Hughes, Edward J. McCluskey

Proceedings of the Fall Joint Computer Conference, November 2-6, 1986, Dallas, Texas, USA, 1986

Multiple Fault Detection in Parity Trees.

Samiha Mourad, Joseph L. A. Hughes, Edward J. McCluskey

Proceedings of the Spring COMPCON'86, 1986

Logic design principles - with emphasis on testable semicustom circuits.

Edward J. McCluskey

Prentice Hall series in computer engineering, Prentice Hall, ISBN: 978-0-13-539768-8, 1986

1985

Built-In Self-Test Structures.

Edward J. McCluskey

IEEE Des. Test, 1985

Built-In Self-Test Techniques.

Edward J. McCluskey

IEEE Des. Test, 1985

Test Teaching.

Edward J. McCluskey

Proceedings of the Proceedings International Test Conference 1985, 1985

Concurrent System-Level Error Detection Using a Watchdog Processor.

Aamer Mahmood, Edward J. McCluskey, Aydin Ersoz

Proceedings of the Proceedings International Test Conference 1985, 1985

Test Length for Pseudo Random Testing.

Cary K. Chin, Edward J. McCluskey

Proceedings of the Proceedings International Test Conference 1985, 1985

Hardware Fault-Tolerance.

Edward J. McCluskey

Proceedings of the Spring COMPCON'85, 1985

An Experimental Study Comparing 74LS181 Test Sets.

Joseph L. A. Hughes, Samiha Mourad, Edward J. McCluskey

Proceedings of the Spring COMPCON'85, 1985

1984

Quantitative Evaluation of Self-Checking Circuits.

David J. Lu, Edward J. McCluskey

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1984

Verification Testing - A Pseudoexhaustive Test Technique.

Edward J. McCluskey

IEEE Trans. Computers, 1984

Self-Testing Embedded Parity Checkers.

Javad Khakbaz, Edward J. McCluskey

IEEE Trans. Computers, 1984

Design of Totally Self-Checking Comparators with an Arbitrary Number of Inputs.

Joseph L. A. Hughes, Edward J. McCluskey, David J. Lu

IEEE Trans. Computers, 1984

An Analysis of the Multiple Fault Detection Capabilities of Single Stuck-at Fault Test Sets.

Joseph L. A. Hughes, Edward J. McCluskey

Proceedings of the Proceedings International Test Conference 1984, 1984

Pseudo-Exhaustive Testing of Sequential Machines Using Signature Analysis.

Syed Zahoor Hassan, Edward J. McCluskey

Proceedings of the Proceedings International Test Conference 1984, 1984

1983

Recurrent Test Patterns.

Edward J. McCluskey, David J. Lu

Proceedings of the Proceedings International Test Conference 1983, 1983

Teaching Testing.

Edward J. McCluskey

Proceedings of the Proceedings International Test Conference 1983, 1983

Concurrent Fault Detection Using a Watchdog Processor and Assertions.

Aamer Mahmood, Edward J. McCluskey, David J. Lu

Proceedings of the Proceedings International Test Conference 1983, 1983

1982

A Statistical Failure/Load Relationship: Results of a Multicomputer Study.

Ravishankar K. Iyer, Steven E. Butner, Edward J. McCluskey

IEEE Trans. Computers, 1982

Built-In Verification Test.

Edward J. McCluskey

Proceedings of the Proceedings International Test Conference 1982, 1982

Verification testing.

Edward J. McCluskey

Proceedings of the 19th Design Automation Conference, 1982

1981

Design for Autonomous Test.

Edward J. McCluskey, Saied Bozorgui-Nesbat

IEEE Trans. Computers, 1981

1980

Testability Considerotions in Microprocessor-Based Design.

John P. Hayes, Edward J. McCluskey

Computer, 1980

Summary of Structural integrity Checking.

David J. Lu, Edward J. McCluskey, Masood Namjoo

Proceedings of the Distributed Data Acquisition, Computing, and Control Symposium, 1980

1979

Logic Design of Multivalued I²L Logic Circuits.

Edward J. McCluskey

IEEE Trans. Computers, 1979

1978

Sequential Circuit Output Probabilities From Regular Expressions.

Kenneth P. Parker, Edward J. McCluskey

IEEE Trans. Computers, 1978

Boolean Network Probabilities and Network Design.

Edward J. McCluskey, Kenneth P. Parker, John J. Shedletsky

IEEE Trans. Computers, 1978

Logic design of multi-valued I2L logic circuits.

Edward J. McCluskey

Proceedings of the eighth international symposium on Multiple-valued logic, 1978

1977

Multivalued Integrated Injection Logic.

Tich T. Dao, Edward J. McCluskey, Lewis K. Russel

IEEE Trans. Computers, 1977

Microcomputers in the Computer Engineering Curriculum.

John F. Wakerly, Edward J. McCluskey

Computer, 1977

Panel Discussions.

John Teets, Charles W. Rose, Edward J. McCluskey

Proceedings of the Symposium on Design Automation and Microprocessors, 1977

1975

Design of Digital Computers - An Introduction

Hans W. Gschwind, Edward J. McCluskey

Texts and Monographs in Computer Science, Springer, ISBN: 978-3-642-86190-1, 1975

Analysis of Logic Circuits with Faults Using Input Signal Probabilities.

Kenneth P. Parker, Edward J. McCluskey

IEEE Trans. Computers, 1975

Probabilistic Treatment of General Combinational Networks.

Kenneth P. Parker, Edward J. McCluskey

IEEE Trans. Computers, 1975

1974

Design of Low-Cost General-Purpose Self-Diagnosing Computers.

John F. Wakerly, Edward J. McCluskey

Proceedings of the Information Processing, 1974

University computer curricula.

Dick B. Simmons, Edward J. McCluskey, Aaron Finerman, Michael L. Dertouzos, Jürg Nievergelt

Proceedings of the American Federation of Information Processing Societies: 1974 National Computer Conference, 1974

1973

An Iterative Cell Switch Design for Hybrid Redundancy.

Daniel P. Siewiorek, Edward J. McCluskey

IEEE Trans. Computers, 1973

Switch Complexity in Systems with Hybrid Redundancy.

Daniel P. Siewiorek, Edward J. McCluskey

IEEE Trans. Computers, 1973

Cosine survey of electrical engineering departments.

Martha E. Sloan, Clarence L. Coates, Edward J. McCluskey

Computer, 1973

Minicomputers in the Digital Laboratory Program.

Taylor L. Booth, C. Gordon Bell, Cecil H. Coker, Robert M. Glorioso, Edward J. McCluskey, Frederic J. Mowle, David M. Robinson

Computer, 1973

1971

Fault Equivalence in Combinational Logic Networks.

Edward J. McCluskey, Frederick W. Clegg

IEEE Trans. Computers, 1971

Test and Diagnosis Procedure for Digital Networks.

Edward J. McCluskey

Computer, 1971

1968

Curriculum 68: Recommendations for academic programs in computer science: a report of the ACM curriculum committee on computer science.

William F. Atchison, Samuel D. Conte, John W. Hamblen, Thomas E. Hull, Thomas A. Keenan, William B. Kehl, Edward J. McCluskey, Silvio O. Navarro, Werner C. Rheinboldt, Earl J. Schweppe, William Viavant, David M. Young

Commun. ACM, 1968

1964

The Coding of Internal States of Sequential Circuits.

Ted A. Dolotta, Edward J. McCluskey

IEEE Trans. Electron. Comput., 1964

About Signal Flow Graph Techniques for Sequential Circuits.

Janusz A. Brzozowski, Edward J. McCluskey

IEEE Trans. Electron. Comput., 1964

Derivation of optimum test sequences for sequential machines

J. F. Poage, Edward J. McCluskey

Proceedings of the 5th Annual Symposium on Switching Circuit Theory and Logical Design, 1964

1963

Reduction of Feedback Loops in Sequential Circuits and Carry Leads in Iterative Networks

Edward J. McCluskey

Inf. Control., June, 1963

Signal Flow Graph Techniques for Sequential Circuit State Diagrams.

Janusz A. Brzozowski, Edward J. McCluskey

IEEE Trans. Electron. Comput., 1963

Logical design theory of NOR gate networks with no complemented inputs

Edward J. McCluskey

Proceedings of the 4th Annual Symposium on Switching Circuit Theory and Logical Design, 1963

1962

The Reduction of Redundancy in Solving Prime Implicant Tables.

Insley B. Pyne, Edward Joseph McCluskey Jr.

IRE Trans. Electron. Comput., 1962

Fundamental Mode and Pulse Mode Operations of Sequential Circuits.

Edward J. McCluskey

Proceedings of the Information Processing, Proceedings of the 2nd IFIP Congress 1962, Munich, Germany, August 27, 1962

1961

Minimal sums for Boolean functions having many unspecified fundamental products

Edward J. McCluskey

Proceedings of the 2nd Annual Symposium on Switching Circuit Theory and Logical Design, 1961

1960

Encoding of incompletely specified Boolean matrices.

Ted A. Dolotta, Edward Joseph McCluskey Jr.

Proceedings of the Papers presented at the 1960 western joint IRE-AIEE-ACM computer conference, 1960

1959

A Note on the Number of Internal Variable Assignments for Sequential Switching Circuits.

Edward Joseph McCluskey Jr., Stephen H. Unger

IRE Trans. Electron. Comput., 1959

1958

Iterative Combinational Switching Networksߞ General Design Considerations.

Edward J. McCluskey

IRE Trans. Electron. Comput., 1958

1957

Comments on Determination of Redundancies in a Set of Patterns.

Edward J. McCluskey

IRE Trans. Inf. Theory, 1957