Edward Hanson
Orcid: 0000-0001-5179-8401
According to our database1,
Edward Hanson
authored at least 11 papers
between 2020 and 2024.
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Bibliography
2024
Block-Wise Mixed-Precision Quantization: Enabling High Efficiency for Practical ReRAM-Based DNN Accelerators.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2024
IEEE Trans. Computers, May, 2024
2023
IEEE Trans. Computers, March, 2023
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023
Si-Kintsugi: Towards Recovering Golden-Like Performance of Defective Many-Core Spatial Architectures for AI.
Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023
Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2023
2022
Proceedings of the ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18, 2022
2021
IEEE Trans. Circuits Syst. II Express Briefs, 2021
ESCALATE: Boosting the Efficiency of Sparse CNN Accelerator with Kernel Decomposition.
Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021
2020
Proceedings of the 37th International Conference on Machine Learning, 2020