Eduardo R. de Lima

According to our database1, Eduardo R. de Lima authored at least 18 papers between 2004 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2024
A 2.0 GHz LC- VCO with 1.4 GHz Tuning Range and Switched Varactor Array.
Proceedings of the 15th IEEE Latin America Symposium on Circuits and Systems, 2024

A 1.7 GHz Tuning Range LC-VCO with Varactors Array and Switched Cross-Coupled Core.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024

2021
Microelectronics Education Environment: A Training Model for the Semiconductors Market.
Proceedings of the IEEE Global Engineering Education Conference, 2021

2018
A Low Complexity ICFO Estimator and Compensator for IEEE 802.15.4g MR-OFDM PHY: Algorithm Proposal and Hardware Implementation.
Proceedings of the 29th IEEE Annual International Symposium on Personal, 2018

2017
Simplified Method for Log-Likelihood Ratio Approximation in High-Order Modulations Based on the Voronoi Decomposition.
IEEE Trans. Broadcast., 2017

2016
Using maximal ratio combining and subcarrier selection to improve the OFDM receiver performance in IEEE802.15.4g.
Proceedings of the 27th IEEE Annual International Symposium on Personal, 2016

Architecture design and implementation of key components of an OFDM transceiver for IEEE 802.15.4g.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Algorithm and Digital Circuit for Blind Frequency and Band Estimation in Spans with Multiple Signals.
Proceedings of the 2016 IEEE Global Communications Conference, 2016

2015
An MR-FSK transceiver compliant to IEEE802.15.4g for smart metering utility applications: FPGA implementation and ASIC resource estimation.
Proceedings of the 7th IEEE Latin-American Conference on Communications, 2015

A frame synchronizer for IEEE 802.15.4-g MR-OFDM PHY: Algorithm proposal and hardware implementation.
Proceedings of the 7th IEEE Latin-American Conference on Communications, 2015

A novel fine frequency estimation serial architecture applied in satellite communications.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Demo: FPGA implementation of an IEEE802.15.4g MR-OFDM baseband modem for smart metering utility networks.
Proceedings of the IEEE 4th Global Conference on Consumer Electronics, 2015

2014
An adaptive equalizer for reliable transmissions in DVB-S2 satellite communications under ISI.
Proceedings of the IEEE Latin-America Conference on Communications, 2014

A detailed DVB-S2 receiver implementation: FPGA prototyping and preliminary ASIC resource estimation.
Proceedings of the IEEE Latin-America Conference on Communications, 2014

2004
Analysis and Contrast Between STC and Spatial Diversity Techniques for OFDM WLAN with Channel Estimation.
Proceedings of the First International Workshop, 2004

A common FPGA based synchronizer architecture for Hiperlan/2 and IEEE 802.11a WLAN systems.
Proceedings of the IEEE 15th International Symposium on Personal, 2004

Performance enhancements in OFDM-WLAN systems using MIMO access techniques.
Proceedings of the 1st IEEE International Symposium on Wireless Communication Systems, 2004

Hardware Design of a FPGA-Based Synchronizer for Hiperlan/2.
Proceedings of the Field Programmable Logic and Application, 2004


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