Eduardo Nunes de Souza

According to our database1, Eduardo Nunes de Souza authored at least 2 papers between 2016 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
Cost-effective Resilient FPGA-based LDPC Decoder Architecture.
Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019

2016
Low cost resilient regular expression matching on FPGAs.
Proceedings of the 2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2016


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