Eduardo Marques

According to our database, Eduardo Marques authored at least 44 papers between 1986 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

A multi-layer probing approach for video over 5G in vehicular scenarios.

Rui Lopes, Filipe Rocha, Susana Sargento, Miguel Luís, Ricardo Leitão, Eduardo Marques, Bruno Antunes

Veh. Commun., 2022

2019

Tourism Guidance Tracking and Safety Platform.

Frederica Gonçalves, Ana Lúcia Martins, João Carlos Ferreira, Eduardo Marques, Magno Andrade, Luís Mota

Proceedings of the Intelligent Transport Systems. From Research and Development to the Market Uptake, 2019

2017

A Hardware/Software Codesign for the Chemical Reactivity of BRAMS.

Carlos Alberto Oliveira De Souza, Erinaldo Pereira, Eduardo Marques

Proceedings of the Euromicro Conference on Digital System Design, 2017

Exploiting Kant and Kimura's Matrix Inversion Algorithm on FPGA.

André B. Perina, Paulo Matias, Eduardo Marques, Vanderlei Bonato, João Miguel Gago Pontes de Brito Lima

Proceedings of the Euromicro Conference on Digital System Design, 2017

2016

Clustering-Based Selection for the Exploration of Compiler Optimization Sequences.

Luiz G. A. Martins, Ricardo Nobre, João M. P. Cardoso, Alexandre C. B. Delbem, Eduardo Marques

ACM Trans. Archit. Code Optim., 2016

Towards a multi-softcore FPGA approach for the HOG algorithm.

José Arnaldo Mascagni de Holanda, João Manuel Paiva Cardoso, Eduardo Marques

Proceedings of the 14th IEEE International Conference on Industrial Informatics, 2016

A hardware/software codesign framework for vision-based ADAS.

Leandro Andrade Martinez, Eduardo Marques

Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

A pipelined multi-softcore approach for the HOG algorithm.

José Arnaldo Mascagni de Holanda, João Manuel Paiva Cardoso, Eduardo Marques

Proceedings of the 2016 Conference on Design and Architectures for Signal and Image Processing (DASIP), 2016

2015

Heterogeneous programming with Single Operation Multiple Data.

Hervé Paulino, Eduardo Marques

J. Comput. Syst. Sci., 2015

A special-purpose language for implementing pipelined FPGA-based accelerators.

Cristiano Bacelar de Oliveira, Ricardo Menotti, João M. P. Cardoso, Eduardo Marques

Proceedings of the 2015 Forum on Specification and Design Languages, 2015

Reconfigurable Hardware Assist for Linux Process Scheduling in Heterogeneous Multicore SoCs.

Maikon Adiles Fernandez Bueno, Carlos R. P. Almeida Jr., José A. M. de Holanda, Eduardo Marques

Proceedings of the Applied Reconfigurable Computing - 11th International Symposium, 2015

2014

Practical Education Fostered by Research Projects in an Embedded Systems Course.

Vanderlei Bonato, Marcio Merino Fernandes, João M. P. Cardoso, Eduardo Marques

Int. J. Reconfigurable Comput., 2014

Tactile Interface for Navigation in Underground Mines.

Victor Adriel de J. Oliveira, Eduardo Marques, Rodrigo de Lemos Peroni, Anderson Maciel

Proceedings of the 16th Symposium on Virtual and Augmented Reality, 2014

Operating system support to an online hardware-software co-design scheduler for heterogeneous multicore architectures.

Maikon Adiles Fernandez Bueno, José A. M. de Holanda, Erinaldo Pereira, Eduardo Marques

Proceedings of the 2014 IEEE 20th International Conference on Embedded and Real-Time Computing Systems and Applications, 2014

Exploration of compiler optimization sequences using clustering-based selection.

Luiz G. A. Martins, Ricardo Nobre, Alexandre C. B. Delbem, Eduardo Marques, João M. P. Cardoso

Proceedings of the SIGPLAN/SIGBED Conference on Languages, 2014

High-Level Synthesis from C vs. a DSL-Based Approach.

Cristiano Bacelar de Oliveira, João M. P. Cardoso, Eduardo Marques

Proceedings of the 2014 IEEE International Parallel & Distributed Processing Symposium Workshops, 2014

A clustering-based approach for exploring sequences of compiler optimizations.

Luiz G. A. Martins, Ricardo Nobre, Alexandre C. B. Delbem, Eduardo Marques, João M. P. Cardoso

Proceedings of the IEEE Congress on Evolutionary Computation, 2014

Adapting Processor Grain via Reconfiguration.

Jecel Mattos de Assumpção Jr., Merik Voswinkel, Eduardo Marques

Proceedings of the Reconfigurable Computing: Architectures, Tools, and Applications, 2014

2013

A Mersenne Twister Hardware Implementation for the Monte Carlo Localization Algorithm.

Vanderlei Bonato, Bruno F. Mazzotti, Marcio Merino Fernandes, Eduardo Marques

J. Signal Process. Syst., 2013

Design Space Exploration based on multiobjective genetic algorithms and clustering-based high-level estimation.

Luiz G. A. Martins, Eduardo Marques

Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

2012

LALP: A Language to Program Custom FPGA-Based Acceleration Engines.

Ricardo Menotti, João M. P. Cardoso, Marcio Merino Fernandes, Eduardo Marques

Int. J. Parallel Program., 2012

The RPG DSL: a case study of language engineering using MDD for generating RPG games for mobile phones.

Eduardo Marques, Valter Balegas, Bruno Fontes Barroca, Ankica Barisic, Vasco Amaral

Proceedings of the 2012 Workshop on Domain-Specific Modeling, 2012

Single Operation Multiple Data - Data Parallelism at Subroutine Level.

Eduardo Marques, Hervé Paulino

Proceedings of the 14th IEEE International Conference on High Performance Computing and Communication & 9th IEEE International Conference on Embedded Software and Systems, 2012

Combining data and computation transformations for fine-grain reconfigurable architectures.

Cristiano B. Oliveira, Eduardo Marques

Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

2011

A PID Controller Applied to the Gain Control of a CMOS Camera Using Reconfigurable Computing.

Drausio Linardi Rossi, Vanderlei Bonato, Eduardo Marques, João Miguel Gago Pontes de Brito Lima

Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011

2009

A Floating-point Extended Kalman Filter Implementation for Autonomous Mobile Robots.

Vanderlei Bonato, Eduardo Marques, George A. Constantinides

J. Signal Process. Syst., 2009

RoboArch: A component-based tool proposal for developing hardware architecture for mobile robots.

Vanderlei Bonato, Eduardo Marques

Proceedings of the IEEE Fourth International Symposium on Industrial Embedded Systems, 2009

LALP: A Novel Language to Program Custom FPGA-Based Architectures.

Ricardo Menotti, João M. P. Cardoso, Marcio Merino Fernandes, Eduardo Marques

Proceedings of the 21st International Symposium on Computer Architecture and High Performance Computing, 2009

Automatic generation of FPGA hardware accelerators using a domain specific language.

Ricardo Menotti, João M. P. Cardoso, Marcio Merino Fernandes, Eduardo Marques

Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

2008

A Parallel Hardware Architecture for Scale and Rotation Invariant Feature Detection.

Vanderlei Bonato, Eduardo Marques, George A. Constantinides

IEEE Trans. Circuits Syst. Video Technol., 2008

A Parallel Hardware Architecture for Image Feature Detection.

Vanderlei Bonato, Eduardo Marques, George A. Constantinides

Proceedings of the Reconfigurable Computing: Architectures, 2008

2007

On Adapting Power Estimation Models for Embedded Soft-Core Processors.

José A. M. de Holanda, Jecel Assumpcao, Denis F. Wolf, Eduardo Marques, João M. P. Cardoso

Proceedings of the IEEE Second International Symposium on Industrial Embedded Systems, 2007

An FPGA Implementation for a Kalman Filter with Application to Mobile Robotics.

Vanderlei Bonato, Rafael Peron, Denis F. Wolf, José A. M. de Holanda, Eduardo Marques, João M. P. Cardoso

Proceedings of the IEEE Second International Symposium on Industrial Embedded Systems, 2007

Towards a Hardware Accelerated Obstacle Avoidance System for Mobile Robots using Monocular Vision.

Jecel Assumpcao, Denis F. Wolf, Eduardo Marques

Proceedings of the IEEE Second International Symposium on Industrial Embedded Systems, 2007

Aggressive Loop Pipelining for Reconfigurable Architectures.

Ricardo Menotti, Eduardo Marques, João M. P. Cardoso

Proceedings of the FPL 2007, 2007

2006

A Methodology to Design FPGA-based PID Controllers.

João Miguel Gago Pontes de Brito Lima, Ricardo Menotti, João M. P. Cardoso, Eduardo Marques

Proceedings of the IEEE International Conference on Systems, 2006

Executing Algorithms for Dynamic Dataflow Reconfigurable Hardware -The Operators Protocol.

Jorge Luiz e Silva, Eduardo Marques

Proceedings of the 2006 IEEE International Conference on Reconfigurable Computing and FPGA's, 2006

An Embedded Multi-camera System for Simultaneous Localization and Mapping.

Vanderlei Bonato, José A. M. de Holanda, Eduardo Marques

Proceedings of the Reconfigurable Computing: Architectures and Applications, 2006

2004

Teaching embedded systems with FPGAs throughout a computer science course.

Vanderlei Bonato, Ricardo Menotti, Eduardo do Valle Simões, Marcio Merino Fernandes, Eduardo Marques

Proceedings of the 2004 workshop on Computer architecture education, 2004

A Real Time Gesture Recognition System for Mobile Robots.

Vanderlei Bonato, Adriano K. Sanches, Marcio Merino Fernandes, João M. P. Cardoso, Eduardo do Valle Simões, Eduardo Marques

Proceedings of the ICINCO 2004, 2004

2003

ARCHITECT-R: A System for Reconfigurable Robots Design.

R. A. Gonçalves, P. A. Moraes, João M. P. Cardoso, Denis F. Wolf, Marcio Merino Fernandes, Roseli A. Francelin Romero, Eduardo Marques

Proceedings of the 2003 ACM Symposium on Applied Computing (SAC), 2003

Web Navigation Patterns.

Ana Cristina Bicharra Garcia, Eduardo Marques

Proceedings of the ICEIS 2003, 2003

1997

UB1 - a recurrent neural network based parallel machine for solving simultaneous linear equations.

Donald L. Hung, Antonio Arsgao, Jorge L. Silva, Eduardo Marques, Karl Hillesland

Proceedings of the 4th Brazilian Symposium on Neural Networks, 1997

1986

Design of a distributed system support based on a centralized parallel bus.

Claudio Kirner, Eduardo Marques

SIGARCH Comput. Archit. News, 1986