Eduardo Chielle

According to our database, Eduardo Chielle authored at least 26 papers between 2011 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

Coupling bit and modular arithmetic for efficient general-purpose fully homomorphic encryption.

Eduardo Chielle, Oleg Mazonka, Homer Gamil, Michail Maniatakos

ACM Trans. Embed. Comput. Syst., July, 2024

Silicon-Proven ASIC Design for the Polynomial Operations of Fully Homomorphic Encryption.

Mohammed Nabeel, Homer Gamil, Deepraj Soni, Mohammed Ashraf, Mizan Abraha Gebremichael, Eduardo Chielle, Ramesh Karri, Mihai Sanduleanu, Michail Maniatakos

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., June, 2024

Optimizing Ciphertext Management for Faster Fully Homomorphic Encryption Computation.

Eduardo Chielle, Oleg Mazonka, Michail Maniatakos

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

2023

CoFHEE: A Co-processor for Fully Homomorphic Encryption Execution.

Mohammed Nabeel, Deepraj Soni, Mohammed Ashraf, Mizan Abraha Gebremichael, Homer Gamil, Eduardo Chielle, Ramesh Karri, Mihai Sanduleanu, Michail Maniatakos

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

2022

E3X: Encrypt-Everything-Everywhere ISA eXtensions for Private Computation.

Eduardo Chielle, Nektarios Georgios Tsoutsos, Oleg Mazonka, Michail Maniatakos

IEEE Trans. Dependable Secur. Comput., 2022

Scalable privacy-preserving cancer type prediction with homomorphic encryption.

Esha Sarkar, Eduardo Chielle, Gamze Gürsoy, Leo Chen, Mark Gerstein, Michail Maniatakos

CoRR, 2022

Fast and Compact Interleaved Modular Multiplication Based on Carry Save Addition.

Oleg Mazonka, Eduardo Chielle, Deepraj Soni, Michail Maniatakos

Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

Accelerating Fully Homomorphic Encryption by Bridging Modular and Bit-Level Arithmetic.

Eduardo Chielle, Oleg Mazonka, Homer Gamil, Michail Maniatakos

Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

2021

Technical report: CoPHEE: Co-processor forPartially Homomorphic Encrypted Execution.

Mohammed Nabeel, Mohammed Ashraf, Eduardo Chielle, Nektarios Georgios Tsoutsos, Michail Maniatakos

IACR Cryptol. ePrint Arch., 2021

Fast and Scalable Private Genotype Imputation Using Machine Learning and Partially Homomorphic Encryption.

Esha Sarkar, Eduardo Chielle, Gamze Gürsoy, Oleg Mazonka, Mark Gerstein, Michail Maniatakos

IEEE Access, 2021

Real-time Private Membership Test using Homomorphic Encryption.

Eduardo Chielle, Homer Gamil, Michail Maniatakos

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020

Practical Data-in-Use Protection Using Binary Decision Diagrams.

Oleg Mazonka, Esha Sarkar, Eduardo Chielle, Nektarios Georgios Tsoutsos, Michail Maniatakos

IEEE Access, 2020

Muon-Ra: Quantum random number generation from cosmic rays.

Homer Gamil, Pranav Mehta, Eduardo Chielle, Adriano Di Giovanni, Mohammed Nabeel, Francesco Arneodo, Michail Maniatakos

Proceedings of the 26th IEEE International Symposium on On-Line Testing and Robust System Design, 2020

2019

Experimental Applications on SRAM-Based FPGA for the NanosatC-BR2 Scientific Mission.

Fabio Benevenuti, Eduardo Chielle, Jorge L. Tonfat, Lucas A. Tambara, Fernanda Lima Kastensmidt, Carlos Alberto Zaffari, João Baptista dos Santos Martins, Otávio Santos Cupertino Durão

Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2019

CoPHEE: Co-processor for Partially Homomorphic Encrypted Execution.

Mohammed Nabeel, Mohammed Ashraf, Eduardo Chielle, Nektarios Georgios Tsoutsos, Michail Maniatakos

Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2019

2018

E³: A Framework for Compiling C++ Programs with Encrypted Operands.

Eduardo Chielle, Oleg Mazonka, Nektarios Georgios Tsoutsos, Michail Maniatakos

IACR Cryptol. ePrint Arch., 2018

PHYLAX: Snapshot-based profiling of real-time embedded devices via JTAG interface.

Charalambos Konstantinou, Eduardo Chielle, Michail Maniatakos

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017

Analyzing the impact of radiation-induced failures in flash-based APSoC with and without fault tolerance techniques at CERN environment.

Lucas A. Tambara, Eduardo Chielle, Fernanda Lima Kastensmidt, Georgios Tsiligiannis, Salvatore Danzeca, Markus Brugger, A. Masi

Microelectron. Reliab., 2017

2016

Hybrid soft error mitigation techniques for COTS processor-based systems.

Eduardo Chielle, Boyang Du, Fernanda Lima Kastensmidt, Sergio Cuenca-Asensi, Luca Sterpone, Matteo Sonza Reorda

Proceedings of the 17th Latin-American Test Symposium, 2016

2015

Application-Based Analysis of Register File Criticality for Reliability Assessment in Embedded Microprocessors.

Felipe Restrepo-Calle, Sergio Cuenca-Asensi, Antonio Martínez-Álvarez, Eduardo Chielle, Fernanda Lima Kastensmidt

J. Electron. Test., 2015

2014

Tuning software-based fault-tolerance techniques for power optimization.

Eduardo Chielle, Fernanda Lima Kastensmidt, Sergio Cuenca-Asensi

Proceedings of the 24th International Workshop on Power and Timing Modeling, 2014

Efficient metric for register file criticality in processor-based systems.

Felipe Restrepo-Calle, Sergio Cuenca-Asensi, Antonio Martínez-Álvarez, Eduardo Chielle, Fernanda Lima Kastensmidt

Proceedings of the 15th Latin American Test Workshop, 2014

2013

Improving error detection with selective redundancy in software-based techniques.

Eduardo Chielle, José Rodrigo Azambuja, Raul S. Barth, Fernanda Lima Kastensmidt

Proceedings of the 14th Latin American Test Workshop, 2013

2012

Configurable tool to protect processors against SEE by software-based detection techniques.

Eduardo Chielle, Raul Sergio Barth, Angelo Cardoso Lapolli, Fernanda Lima Kastensmidt

Proceedings of the 13th Latin American Test Workshop, 2012

Soft-Error Probability Due to SET in Clock Tree Networks.

Raul Chipana, Eduardo Chielle, Fernanda Lima Kastensmidt, Jorge L. Tonfat, Ricardo Reis

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2012

2011

Designing and analyzing a SpaceWire router IP for soft errors detection.

Jimmy Tarrillo, Raul Chipana, Eduardo Chielle, Fernanda Lima Kastensmidt

Proceedings of the 12th Latin American Test Workshop, 2011