Edson P. Santana

Orcid: 0000-0003-2685-025X

According to our database1, Edson P. Santana authored at least 16 papers between 2005 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2022
Application of improved ACM model to the design by hand of CMOS analog circuits.
Microelectron. J., 2022

A Graphical Interface Learning Tool for Image Processing Through Analog CNN.
Circuits Syst. Signal Process., 2022

2020
A CMOS Analog Two-Layer Full Signal Range Cellular Neural Network for Image Filtering.
Proceedings of the 33rd Symposium on Integrated Circuits and Systems Design, 2020

Proportional Source Transconductances Integrator for CMOS Analog Filtering with Calibration.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
CMOS analog four-quadrant multiplier free of voltage reference generators.
Proceedings of the 32nd Symposium on Integrated Circuits and Systems Design, 2019

A Very Compact CMOS Analog Multiplier for Application in CNN Synapses.
Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019

Evaluation of Distortion Level in Analog Multipliers through DC Analysis Only.
Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019

CNN Learning for Image Processing: Center of Mass versus Genetic Algorithms.
Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019

2018
CMOS analog filter design using the Proportional Source Transconductances Integrator.
Microelectron. J., 2018

CMOS analog multiplier with high rejection of power supply ripple.
Proceedings of the 9th IEEE Latin American Symposium on Circuits & Systems, 2018

2017
Improvements to a compact MOSFET model for design by hand.
Proceedings of the 15th IEEE International New Circuits and Systems Conference, 2017

Improving a MOSFET model for design by hand.
Proceedings of the 8th IEEE Latin American Symposium on Circuits & Systems, 2017

2016
Distortion analysis of integrated analog multipliers: DC versus AC approaches.
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016

2015
Image filtering in a CMOS analog CNN.
Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015

2009
Distortion analysis of analog multiplier circuits using two-dimensional integral nonlinear function.
Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, 2009

2005
On the adequate transistor modeling for optimal design of CMOS OTA.
Proceedings of the 18th Annual Symposium on Integrated Circuits and Systems Design, 2005


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