Edinei Santin
Orcid: 0000-0003-4713-8632
According to our database1,
Edinei Santin
authored at least 11 papers
between 2010 and 2019.
Collaborative distances:
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Bibliography
2019
IEEE Instrum. Meas. Mag., 2019
2013
Gain enhancement and input parasitic capacitance reduction of single-stage OTAs by using differential voltage combiners.
Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems, 2013
2012
Fast and accurate estimation of gain and sample-time mismatches in time-interleaved ADCs using on-chip oscillators.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
2011
A Fully Integrated and Reconfigurable Architecture for Coherent Self-Testing of High Speed Analog-to-Digital Converters.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011
A Two-Stage Fully Differential Inverter-Based Self-Biased CMOS Amplifier With High Efficiency.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011
Proceedings of the Technological Innovation for Sustainability, 2011
2010
An 8-bit 120-MS/s Interleaved CMOS Pipeline ADC Based on MOS Parametric Amplification.
IEEE Trans. Circuits Syst. II Express Briefs, 2010
Fully integrated and reconfigurable architecture for coherent self-testing of IQ ADCs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Two-stage fully-differential inverter-based self-biased CMOS amplifier with high efficiency.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Proceedings of the Emerging Trends in Technological Innovation, 2010
Fast-settling low-power two-stage self-biased CMOS amplifier using feedforward-regulated cascode devices.
Proceedings of the 17th IEEE International Conference on Electronics, 2010