Ed Grochowski

According to our database, Ed Grochowski authored at least 10 papers between 1989 and 2014.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2014

Improving the energy efficiency of Big Cores.

Kenneth Czechowski, Victor W. Lee, Ed Grochowski, Ronny Ronen, Ronak Singhal, Richard W. Vuduc, Pradeep Dubey

Proceedings of the ACM/IEEE 41st International Symposium on Computer Architecture, 2014

2012

Performance Benefits of Heterogeneous Computing in HPC Workloads.

Victor W. Lee, Ed Grochowski, Robert Geva

Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012

2009

Larrabee: A Many-Core x86 Architecture for Visual Computing.

Larry Seiler, Doug Carmean, Eric Sprangle, Tom Forsyth, Pradeep Dubey, Stephen Junkins, Adam T. Lake, Robert Cavin, Roger Espasa, Ed Grochowski, Toni Juan, Michael Abrash, Jeremy Sugerman, Pat Hanrahan

IEEE Micro, 2009

2008

Implications of device timing variability on full chip timing.

Ed Grochowski, Murali Annavaram, Paul Reed

Proceedings of the 2008 International Symposium on Physical Design, 2008

2005

Mitigating Amdahl's Law through EPI Throttling.

Murali Annavaram, Ed Grochowski, John Paul Shen

Proceedings of the 32st International Symposium on Computer Architecture (ISCA 2005), 2005

2004

Best of Both Latency and Throughput.

Ed Grochowski, Ronny Ronen, John Paul Shen, Hong Wang

Proceedings of the 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 2004

2003

Microarchitectural dI/dt Control.

Ed Grochowski, David Ayers, Vivek Tiwari

IEEE Des. Test Comput., 2003

2002

Memory Latency-Tolerance Approaches for Itanium Processors: Out-of-Order Execution vs. Speculative Precomputation.

Perry H. Wang, Hong Wang, Jamison D. Collins, Ed Grochowski, Ralph-Michael Kling, John Paul Shen

Proceedings of the Eighth International Symposium on High-Performance Computer Architecture (HPCA'02), 2002

Microarchitectural Simulation and Control of di/dt-induced Power Supply Voltage Variation.

Ed Grochowski, David Ayers, Vivek Tiwari

Proceedings of the Eighth International Symposium on High-Performance Computer Architecture (HPCA'02), 2002

1989

Issues in the implementation of the i486TM cache and bus.

Ed Grochowski, Ken Shoemaker

Proceedings of the Computer Design: VLSI in Computers and Processors, 1989