Ecenur Ustun

According to our database, Ecenur Ustun authored at least 10 papers between 2018 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2023

TAPA: A Scalable Task-parallel Dataflow Programming Framework for Modern FPGAs with Co-optimization of HLS and Physical Design.

Licheng Guo, Yuze Chi, Jason Lau, Linghao Song, Xingyu Tian, Moazin Khatti, Weikang Qiao, Jie Wang, Ecenur Ustun, Zhenman Fang, Zhiru Zhang, Jason Cong

ACM Trans. Reconfigurable Technol. Syst., December, 2023

Equality Saturation for Datapath Synthesis: A Pathway to Pareto Optimality.

Ecenur Ustun, Cunxi Yu, Zhiru Zhang

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022

IMpress: Large Integer Multiplication Expression Rewriting for FPGA HLS.

Ecenur Ustun, Ismail San, Jiaqi Yin, Cunxi Yu, Zhiru Zhang

Proceedings of the 30th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2022

2021

Programming and Synthesis for Software-defined FPGA Acceleration: Status and Future Prospects.

Yi-Hsiang Lai, Ecenur Ustun, Shaojie Xiang, Zhenman Fang, Hongbo Rong, Zhiru Zhang

ACM Trans. Reconfigurable Technol. Syst., 2021

GraphLily: Accelerating Graph Linear Algebra on HBM-Equipped FPGAs.

Yuwei Hu, Yixiao Du, Ecenur Ustun, Zhiru Zhang

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

AutoBridge: Coupling Coarse-Grained Floorplanning and Pipelining for High-Frequency HLS Design on Multi-Die FPGAs.

Licheng Guo, Yuze Chi, Jie Wang, Jason Lau, Weikang Qiao, Ecenur Ustun, Zhiru Zhang, Jason Cong

Proceedings of the FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28, 2021

2020

Accurate Operation Delay Prediction for FPGA HLS Using Graph Neural Networks.

Ecenur Ustun, Chenhui Deng, Debjit Pal, Zhijing Li, Zhiru Zhang

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

2019

LAMDA: Learning-Assisted Multi-stage Autotuning for FPGA Design Closure.

Ecenur Ustun, Shaojie Xiang, Jinny Gui, Cunxi Yu, Zhiru Zhang

Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

2018

DATuner: An Extensible Distributed Autotuning Framework for FPGA Design and Design Automation: (Abstract Only).

Gai Liu, Ecenur Ustun, Shaojie Xiang, Chang Xu, Guojie Luo, Zhiru Zhang

Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018

Fast and Accurate Estimation of Quality of Results in High-Level Synthesis with Machine Learning.

Steve Dai, Yuan Zhou, Hang Zhang, Ecenur Ustun, Evangeline F. Y. Young, Zhiru Zhang

Proceedings of the 26th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2018