Ebrahim Farshidi

According to our database1, Ebrahim Farshidi authored at least 23 papers between 2008 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2023
Improved Turn-On Speed of Low-Power Loads in Pulsed Power Supply Scheme and High-Energy Efficiency.
J. Circuits Syst. Comput., May, 2023

Transfer learning; powerful and fast segmentation and classification prostate cancer from MRI scans, in the development set.
J. Intell. Fuzzy Syst., 2023

2022
A new approach for data augmentation in a deep neural network to implement a monitoring system for detecting prostate cancer in MRI images.
J. Intell. Fuzzy Syst., 2022

2021
Design and FPGA implementation of a multirate Δ∑ time-to-digital converter with third-order noise-shaping.
Microelectron. J., 2021

Design and Analysis of a Multirate 5-bit High-Order 52 fs<sub>rms</sub> Δ ∑ Time-to-Digital Converter Implemented on 40 nm Altera Stratix IV FPGA.
IEEE Access, 2021

2020
Analysis, Design, and Implementation of a ZVT High Step-Up DC-DC Converter With Continuous Input Current.
IEEE Trans. Ind. Electron., 2020

Novel design for a low-latency CORDIC algorithm for sine-cosine computation and its Implementation on FPGA.
Microprocess. Microsystems, 2020

2019
Robust reservoir rock fracture recognition based on a new sparse feature learning and data training method.
Multidimens. Syst. Signal Process., 2019

A low power passive-active ΔΣ modulator with high-resolution employing an integrator with open-loop unity-gain buffer.
Integr., 2019

A Split-Based Digital Background Calibration of Pipelined Analog-to-Digital Converters by Cubic Spline Interpolation Filtering.
Circuits Syst. Signal Process., 2019

Two-Stage Estimator for Frequency Rate and Initial Frequency in LFM Signal Using Linear Prediction Approach.
Circuits Syst. Signal Process., 2019

2018
A New Low Voltage Analog Circuit Model for Hodgkin-Huxley Neuron Employing FGMOS Transistors.
J. Circuits Syst. Comput., 2018

2016
Analysis and Modeling of Imperfections in Multi-Bit Per Stage Pipelined ADCs.
J. Circuits Syst. Comput., 2016

A new approach to analysis of residue probability density function in pipelined ADCs.
Integr., 2016

A New Approach to Analysis and Design of Chaos-Based Random Number Generators Using Algorithmic Converter.
Circuits Syst. Signal Process., 2016

2015
A New Triple-Slope Pipelined Time to Digital Converter by Stretching of Time.
J. Circuits Syst. Comput., 2015

2013
New systematic two-graph-based approach of active filters employing multiple output current controlled conveyors.
IET Circuits Devices Syst., 2013

A FG-MOS Based Fully Differential Current Controlled Conveyor and Its Applications.
Circuits Syst. Signal Process., 2013

2010
Synthesis of class-AB log-domain filters based on nonlinear transconductance.
Microelectron. J., 2010

2009
A low-voltage class-AB linear transconductance based on floating-gate MOS technology.
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009

A current-mode euclidean distance calculator based on electronically simulated translinear principle.
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009

2008
A 1.2 V current-mode true RMS-DC converter based on the floating gate MOS translinear principle.
Microelectron. J., 2008

A frequency based digital background calibration technique for pipelined ADCs.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008


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