E. P. Jayakumar

Orcid: 0000-0002-6692-8720

According to our database1, E. P. Jayakumar authored at least 6 papers between 2016 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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Links

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Bibliography

2024
Weighted edge-based low-cost artifacts-free high-quality VLSI implementation for demosaicking.
J. Real Time Image Process., October, 2024

HSMF: hardware-efficient single-stage feedback mean filter for high-density salt-and-pepper noise removal.
J. Real Time Image Process., July, 2024

Quantized Neural Network Architecture for Hardware Efficient Real-Time 4K Image Super-Resolution.
Proceedings of the 28th International Symposium on VLSI Design and Test, 2024

2023
Design and implementation of hardware-efficient architecture for saturation-based image dehazing algorithm.
J. Real Time Image Process., October, 2023

Low-cost low-power approximated VLSI architecture for high-quality image scaling in mobile devices.
J. Real Time Image Process., February, 2023

2016
Integrated acoustic echo and noise suppression in modulation domain.
Int. J. Speech Technol., 2016


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