Dwight D. Hill

According to our database1, Dwight D. Hill authored at least 27 papers between 1979 and 2012.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2012
Clock mesh framework.
Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012

2004
Guest Editors' Introduction: RTL to GDSII - From Foilware to Standard Practice.
IEEE Des. Test Comput., 2004

2000
Editorial.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000

An industrial view of electronic design automation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000

1997
Architectural and Physical Design Challenges for One-Million Gate FPGAs and Beyond.
Proceedings of the 1997 ACM/SIGDA Fifth International Symposium on Field Programmable Gate Arrays, 1997

1993
The benefits of flexibility in lookup table-based FPGAs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993

1992
Three Decades of HDLs: Part II, Conlan Through Verilog.
IEEE Des. Test Comput., 1992

Routable Technologie Mapping for LUT FPGAs.
Proceedings of the Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1992

ORCA: A New Architecture for High-Performance FPLs.
Proceedings of the Field-Programmable Gate Arrays: Architectures and Tools for Rapid Prototyping, Second International Workshop on Field-Programmable Logic and Applications, Vienna, Austria, August 31, 1992

FPGA Design Principles (A Tutorial).
Proceedings of the 29th Design Automation Conference, 1992

1991
A CAD System for the Design of Field Programmable Gate Arrays.
Proceedings of the 28th Design Automation Conference, 1991

1990
Preliminary description of Tabula Rasa, an electrically reconfigurable hardware engine.
Proceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1990

Placement algorithms for CMOS cell synthesis.
Proceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1990

Global Routing Considerations in a Cell Synthesis System.
Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, 1990

Benchmarks for Cell Synthesis.
Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, 1990

1988
Alternative strategies for applying min-cut to VLSI placement.
Proceedings of the Computer Design: VLSI in Computers and Processors, 1988

1985
Design and Implementation of Switching Systems for Parallel Processors.
Proceedings of the International Conference on Parallel Processing, 1985

Effective use of virtual grid compaction in macro-module generators.
Proceedings of the 22nd ACM/IEEE conference on Design automation, 1985

Prolog in CMOS Circuit Design.
Proceedings of the Spring COMPCON'85, 1985

1984
Icon: A Tool for Design at Schematic, Virtual Grid, and Layout Levels.
IEEE Des. Test, 1984

An Architecture and Protocol for a high Speed Local Area Network Supporting Integrated Traffic.
Proceedings of the Proceedings IEEE INFOCOM 84, San Francisco, CA, USA, April 9-12, 1984, 1984

1983
Edisim: A Graphical Simulator Interface for LSI Design.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1983

An analysis of C machine support for other block-structured languages.
SIGARCH Comput. Archit. News, 1983

Edisim and Edicap: Graphical simulator interfaces.
Proceedings of the 20th Design Automation Conference, 1983

1982
Dragnet: a local network with protection.
Comput. Commun. Rev., 1982

1981
A hardware mechanism for supporting range checks.
SIGARCH Comput. Archit. News, 1981

1979
SABLE: A tool for generating structured, multi-level simulations.
Proceedings of the 16th Design Automation Conference, 1979


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