Dusan Suvakovic

According to our database1, Dusan Suvakovic authored at least 15 papers between 1998 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2016
Multi-user encoding for forward error correction in passive optical networks.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015
Energy-Efficient Cascaded Bit-Interleaved Converged Optical Access/In-Building Network Protocol.
JOCN, 2015

RAM-based micro-architecture for a high-throughput interconnection network.
Proceedings of the 36th IEEE Sarnoff Symposium 2015, Newark, NJ, USA, 2015

2014
A Low-Energy Rate-Adaptive Bit-Interleaved Passive Optical Network.
IEEE J. Sel. Areas Commun., 2014

Energy-efficiency improvements for optical access.
IEEE Commun. Mag., 2014

CBI: a scalable energy-efficient protocol for metro/access networks.
Proceedings of the IEEE Online Conference on Green Communications, 2014

Timing errors in LDPC decoding computations with overscaled supply voltage.
Proceedings of the International Symposium on Low Power Electronics and Design, 2014

2013
Energy-efficient cascaded bit-interleaving protocol for integrated optical access/in-building networks.
Proceedings of the IEEE Online Conference on Green Communications, OnlineGreenComm 2013, 2013

Power scalable descrambling methods for bit-interleaved TDM networks.
Proceedings of IEEE International Conference on Communications, 2013

2012
Low energy bit-interleaving downstream protocol for passive optical networks.
Proceedings of the IEEE Online Conference on Green Communications, 2012

2011
Compact Highly-Utilized Reed Solomon Decoder Architectures for Optical Access Networks.
Proceedings of the Global Communications Conference, 2011

2005
An FPGA Application with High Speed Serial Transceiver Running at Sub-nominal Rate.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

2003
Energy Efficient Adiabatic Multiplier-Accumulator Design.
J. VLSI Signal Process., 2003

2000
A pipelined multiply-accumulate unit design for energy recovery DSP systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1998
Guidelines for Use of Registers and Multiplexers in Low Power Low Voltage DSP Systems.
Proceedings of the 8th Great Lakes Symposium on VLSI (GLS-VLSI '98), 1998


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