Dusan Petranovic

According to our database1, Dusan Petranovic authored at least 19 papers between 1998 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2021
Cross-Boundary Inductive Timing Optimization for 2.5D Chiplet-Package Co-Design.
Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021

2020
Full-Chip Electro-Thermal Coupling Extraction and Analysis for Face-to-Face Bonded 3D ICs.
Proceedings of the ISPD 2020: International Symposium on Physical Design, Taipei, Taiwan, March 29, 2020

Coupling Extraction and Optimization for Heterogeneous 2.5D Chiplet-Package Co-Design.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

2015
Multi-TSV and E-Field Sharing Aware Full-chip Extraction and Mitigation of TSV-to-Wire Coupling.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Full-chip Inter-die Parasitic Extraction in Face-to-Face-Bonded 3D ICs.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

2014
Silicon Effect-Aware Full-Chip Extraction and Mitigation of TSV-to-TSV Coupling.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

Efficient and accurate RIE modeling methodology for BEOL 2.5D parasitic extraction.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

Fast and Accurate Full-chip Extraction and Optimization of TSV-to-Wire Coupling.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2013
On accurate full-chip extraction and optimization of TSV-to-TSV coupling elements in 3D ICs.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

2011
A Novel Moment Based Framework for Accurate and Efficient Static Timing Analysis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

2009
Simple and Accurate Models for Capacitance Considering Floating Metal Fill Insertion.
IEEE Trans. Very Large Scale Integr. Syst., 2009

Robust verification of 3D-ICs: Pros, cons and recommendations.
Proceedings of the IEEE International Conference on 3D System Integration, 2009

2007
Including inductance in static timing analysis.
Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

Simple and Accurate Models for Capacitance Increment due to Metal Fill Insertion.
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

2006
Importance of volume discretization of single and coupled interconnects.
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006

2004
Resistance Matrix in Crosstalk Modeling for Muliconductor Systems.
Proceedings of the 5th International Symposium on Quality of Electronic Design (ISQED 2004), 2004

2003
A Sum-over-Paths Impulse-Response Moment-Extraction Algorithm for IC-Interconnect Networks: Verification, Coupled RC Lines.
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003

2001
MetaCores: Design and Optimization Techniques.
Proceedings of the 38th Design Automation Conference, 2001

1998
Finite word-length effects in implementation of distributions for time-frequency signal analysis.
IEEE Trans. Signal Process., 1998


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