Durand Jarrett-Amor

According to our database, Durand Jarrett-Amor authored at least 5 papers between 2016 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

A 16 Gbps, 0.126 pJ/bit, Single-Ended TIA Driver with Impedance Peaking Control for SBD D2D Links.

Durand Jarrett-Amor, Tony Chan Carusone

Proceedings of the 22nd IEEE Interregional NEWCAS Conference, 2024

2023

A 32 Gb/s, 0.42 pJ/bit Passive Hybrid Simultaneous Bidirectional Transceiver for Die-to-Die Links.

Durand Jarrett-Amor, Kunal Yadav, Danny Zhang, Bangda Yang, Sadegh Jalali, Tony Chan Carusone

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2016

Data transient insensitive phase-locked loops.

Durand Jarrett-Amor, Fei Yuan

Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016

Time integrator for mixed-mode signal processing.

Young Jun Park, Durand Jarrett-Amor, Fei Yuan

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Time-mode techniques for fast-locking phase-locked loops.

Durand Jarrett-Amor, Young Jun Park, Fei Yuan

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016