Dunshan Yu

According to our database, Dunshan Yu authored at least 49 papers between 2006 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

An Energy-Efficient Differential Frame Convolutional Accelerator with on-Chip Fusion Storage Architecture and Pixel-Level Pipeline Data Flow.

Zhenhui Dai, Jiawei Wang, Yi Zhong, Kunyu Feng, Cheng Zhao, Yuanyuan Jiang, Peiyu Chen, Yuan Wang, Dunshan Yu, Xiaoxin Cui

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2023

A multichannel readout integrated circuit with column-wise pseudo differential extended counting ADCs for an uncooled infrared focal plane array based on silicon diodes.

Ye Zhou, Wengao Lu, Shanzhe Yu, Dunshan Yu, Yacong Zhang, Zhongjian Chen

Microelectron. J., September, 2023

Multimodal Affective States Recognition Based on Multiscale CNNs and Biologically Inspired Decision Fusion Model.

Yuxuan Zhao, Xinyan Cao, Jinlong Lin, Dunshan Yu, Xixin Cao

IEEE Trans. Affect. Comput., 2023

2022

ESSA: Design of a Programmable Efficient Sparse Spiking Neural Network Accelerator.

Yisong Kuang, Xiaoxin Cui, Zilin Wang, Chenglong Zou, Yi Zhong, Kefei Liu, Zhenhui Dai, Dunshan Yu, Yuan Wang, Ru Huang

IEEE Trans. Very Large Scale Integr. Syst., 2022

An Event-driven Spiking Neural Network Accelerator with On-chip Sparse Weight.

Yisong Kuang, Xiaoxin Cui, Chenglong Zou, Yi Zhong, Zhenhui Dai, Zilin Wang, Kefei Liu, Dunshan Yu, Yuan Wang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021

A 64K-Neuron 64M-1b-Synapse 2.64pJ/SOP Neuromorphic Chip With All Memory on Chip for Spike-Based Models in 65nm CMOS.

Yisong Kuang, Xiaoxin Cui, Yi Zhong, Kefei Liu, Chenglong Zou, Zhenhui Dai, Yuan Wang, Dunshan Yu, Ru Huang

IEEE Trans. Circuits Syst. II Express Briefs, 2021

A 28-nm 0.34-pJ/SOP Spike-Based Neuromorphic Processor for Efficient Artificial Neural Network Implementations.

Yisong Kuang, Xiaoxin Cui, Yi Zhong, Kefei Liu, Chenglong Zou, Zhenhui Dai, Dunshan Yu, Yuan Wang, Ru Huang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Low Power Readout Integrated Circuit with PFM-based ADCs Employing Residue Quantization for Uncooled Infrared Imagers.

Ye Zhou, Shanzhe Yu, Wengao Lu, Dunshan Yu, Yacong Zhang, Zhongjian Chen

Proceedings of the 14th IEEE International Conference on ASIC, 2021

A Novel Circuit Authentication Scheme Based on Partial Polymorphic Gates.

Timothy Dunlap, Omid Aramoon, Gang Qu, Tian Wang, Xiaoxin Cui, Dunshan Yu

Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2021

2020

Fully on-chip clock jitter and skew measurement scheme via incoherent subsampling.

Yinxuan Lyu, Jianhua Feng, Kai Zhu, Hongfei Ye, Dunshan Yu

Microelectron. J., 2020

A 3D Convolutional Neural Network for Emotion Recognition based on EEG Signals.

Yuxuan Zhao, Jin Yang, Jinlong Lin, Dunshan Yu, Xixin Cao

Proceedings of the 2020 International Joint Conference on Neural Networks, 2020

2019

A New Method for Futures Price Trends Forecasting Based on BPNN and Structuring Data.

Weijun Lu, Chao Geng, Dunshan Yu

IEICE Trans. Inf. Syst., 2019

Multimodal Emotion Recognition Model using Physiological Signals.

Yuxuan Zhao, Xinyan Cao, Jinlong Lin, Dunshan Yu, Xixin Cao

CoRR, 2019

FPGA Implementation of Quantized Convolutional Neural Networks.

Qi Zhang, Jian Cao, Ying Zhang, Shiguang Zhang, Quan Zhang, Dunshan Yu

Proceedings of the 19th IEEE International Conference on Communication Technology, 2019

Perceptual Fast CU Size Decision Algorithm for AVS2 Intra Coding.

Hao Xie, Guoqing Xiang, Dunshan Yu, Hong Yu, Yuan Li, Wei Yan

Proceedings of the Fifth IEEE International Conference on Multimedia Big Data, 2019

Designing a 3D Graphics Processor for Mobile Applications.

Lingjuan Wu, Wenqian Zhao, Dunshan Yu

Proceedings of the 13th IEEE International Conference on ASIC, 2019

Improved Discrete Wavelet Analysis and Principal Component Analysis for EEG Signal Processing.

Yi-Hsiang Chen, Xiaoxin Cui, Kanglin Xiao, Dunshan Yu

Proceedings of the 13th IEEE International Conference on ASIC, 2019

2018

Evaluation of Dynamic-Adjusting Threshold-Voltage Scheme for Low-Power FinFET Circuits.

Tian Wang, Xiaoxin Cui, Yewen Ni, Dunshan Yu, Xiaole Cui

IEEE Trans. Very Large Scale Integr. Syst., 2018

Design of Low-Power High-Performance FinFET Standard Cells.

Tian Wang, Xiaoxin Cui, Kai Liao, Nan Liao, Dunshan Yu, Xiaole Cui

Circuits Syst. Signal Process., 2018

A 108fs_rms 0.45mW 100MS/s 1.25MHz bandwidth multi-bit ΔΣ time-to-digital converter with dynamic element matching.

Yinxuan Lyu, Jianhua Feng, Chenfeng Tu, Linqi Shi, Hongfei Ye, Weixin Gai, Dunshan Yu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

A Novel Polymorphic Gate Based Circuit Fingerprinting Technique.

Tian Wang, Xiaoxin Cui, Dunshan Yu, Omid Aramoon, Timothy Dunlap, Gang Qu, Xiaole Cui

Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018

Polymorphic gate based IC watermarking techniques.

Tian Wang, Xiaoxin Cui, Dunshan Yu, Omid Aramoon, Timothy Dunlap, Gang Qu, Xiaole Cui

Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

2017

High-Performance Noninvasive Side-Channel Attack Resistant ECC Coprocessor for GF(2m ).

Kai Liao, Xiaoxin Cui, Nan Liao, Tian Wang, Dunshan Yu, Xiaole Cui

IEEE Trans. Ind. Electron., 2017

Improving DFA attacks on AES with unknown and random faults.

Nan Liao, Xiaoxin Cui, Kai Liao, Tian Wang, Dunshan Yu, Xiaole Cui

Sci. China Inf. Sci., 2017

A practical cold boot attack on RSA private keys.

Tian Wang, Xiaoxin Cui, Yewen Ni, Dunshan Yu, Xiaole Cui, Gang Qu

Proceedings of the 2017 Asian Hardware Oriented Security and Trust Symposium, 2017

2016

Low Power High Performance FinFET Standard Cells Based on Mixed Back Biasing Technology.

Tian Wang, Xiaoxin Cui, Kai Liao, Nan Liao, Xiaole Cui, Dunshan Yu

IEICE Trans. Electron., 2016

Efficient Weak Signals Acquisition Strategy for GNSS Receivers.

Weijun Lu, Yanbin Zhang, Dengyun Lei, Dunshan Yu

IEICE Trans. Commun., 2016

Ultralow-power high-speed flip-flop based on multimode FinFETs.

Kai Liao, Xiaoxin Cui, Nan Liao, Tian Wang, Dunshan Yu, Xiaole Cui

Sci. China Inf. Sci., 2016

Improving tracking accuracy with subcarrier assistance and code monitoring for BOC modulated signal.

Yanbin Zhang, Weijun Lu, Ruiyuan Liu, Dunshan Yu

Comput. Electr. Eng., 2016

2015

Balance Differential Coherent Bit Synchronization Algorithm for GNSS Receiver.

Dengyun Lei, Weijun Lu, Yanbin Zhang, Dunshan Yu

IEICE Trans. Commun., 2015

Key characterization factors of accurate power modeling for FinFET circuits.

Kaisheng Ma, Xiaoxin Cui, Kai Liao, Nan Liao, Di Wu, Dunshan Yu

Sci. China Inf. Sci., 2015

Employing the mixed FBB/RBB in the design of FinFET logic gates.

Tian Wang, Xiaoxin Cui, Kai Liao, Nan Liao, Yewen Ni, Dunshan Yu, Xiaole Cui

Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

A high-efficient and accurate fault model aiming at FPGA-based AES cryptographic applications.

Nan Liao, Xiaoxin Cui, Tian Wang, Kai Liao, Yewen Ni, Dunshan Yu, Xiaole Cui

Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

2014

Effective PPS Signal Generation with Predictive Synchronous Loop for GPS.

Yanbin Zhang, WeiJun Lu, Dengyun Lei, Yongcan Huang, Dunshan Yu

IEICE Trans. Commun., 2014

Resource-efficient acquisition architecture for BOC-modulated signals.

Dengyun Lei, Weijun Lu, Dunshan Yu

IEICE Electron. Express, 2014

Ultra-low power dissipation of improved complementary pass-transistor adiabatic logic circuits based on FinFETs.

Kai Liao, Xiaoxin Cui, Nan Liao, Kaisheng Ma, Di Wu, Wei Wei, Rui Li, Dunshan Yu

Sci. China Inf. Sci., 2014

Low power adiabatic logic based on FinFETs.

Nan Liao, Xiaoxin Cui, Kai Liao, Kaisheng Ma, Di Wu, Wei Wei, Rui Li, Dunshan Yu

Sci. China Inf. Sci., 2014

High-speed constant-time division module for Elliptic Curve Cryptography based on GF(2^m).

Kai Liao, Xiaoxin Cui, Nan Liao, Tian Wang, Xiao Zhang, Ying Huang, Dunshan Yu

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013

A capacitive Interface Circuit with capacitor mismatch Auto-compensation for MEMS gyroscope.

Ran Fang, Wengao Lu, Guannan Wang, Tingting Tao, Yacong Zhang, Zhongjian Chen, Dunshan Yu

J. Circuits Syst. Comput., 2013

A Low-noise High-voltage Interface Circuit for capacitive MEMS gyroscope.

Ran Fang, Wengao Lu, Guannan Wang, Tingting Tao, Yacong Zhang, Zhongjian Chen, Dunshan Yu

J. Circuits Syst. Comput., 2013

Design of a Reconfigurable Acoustic Modem for Underwater Sensor Networks.

Lingjuan Wu, Ryan Kastner, Bo Gu, Dunshan Yu

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2013

A Dynamic-Adjusting Threshold-Voltage Scheme for FinFETs low power designs.

Xiaoxin Cui, Kaisheng Ma, Kai Liao, Nan Liao, Di Wu, Wei Wei, Rui Li, Dunshan Yu

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2011

A JTAG-based configuration circuit applied in SerDes chip.

Xun Jiang, Xiaoxin Cui, Dunshan Yu

Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

2009

A Low Cost Correlator Structure in the Pseudo-Noise Code Acquisition System.

WeiJun Lu, Ying Li, Dunshan Yu, Xing Zhang

IEICE Trans. Commun., 2009

Application-Dependent Interconnect Testing of Xilinx FPGAs Based on Line Branches Partitioning.

Teng Lin, Jianhua Feng, Dunshan Yu

IEICE Trans. Inf. Syst., 2009

2006

An Efficient VLSI Implementation of Distributed Architecture for DWT.

Xixin Cao, Qingqing Xie, Chungan Peng, Qingchun Wang, Dunshan Yu

Proceedings of the IEEE 8th Workshop on Multimedia Signal Processing, 2006

A Discrete STFT Processor for Real-time Spectrum Analysis.

Shiqun Zhang, Dunshan Yu, Shimin Sheng

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

A CMOS Differential Difference Amplifier with Reduced Nonlinearity Error of Interpolation for Interpolating ADCs.

Xin Zhang, Dunshan Yu, Shimin Sheng

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

Design and Implementation of a 2-level FSK Digital Modems Using CORDIC Algorithm.

Xiaoxin Cui, Dunshan Yu, Shimin Sheng, Xiaole Cui

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006