Duncan G. Elliott

According to our database, Duncan G. Elliott authored at least 42 papers between 1999 and 2020.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2020

Analytic Model for Low Earth Orbit Satellite Solar Power.

John Petrus Grey, Ian R. Mann, Michael D. Fleischauer, Duncan G. Elliott

IEEE Trans. Aerosp. Electron. Syst., 2020

2019

A High-Performance and Energy-Efficient FIR Adaptive Filter Using Approximate Distributed Arithmetic Circuits.

Honglan Jiang, Leibo Liu, Pieter P. Jonker, Duncan G. Elliott, Fabrizio Lombardi, Jie Han

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Design and Verification of a Robust Release Mechanism for CubeSat Deployables.

Stefan Damkjar, Collin Cupido, Charles Nokes, Ian R. Mann, Duncan G. Elliott

Proceedings of the 2019 IEEE Canadian Conference of Electrical and Computer Engineering, 2019

2018

High-Efficiency Charge Pumps for Low-Power On-Chip Applications.

Xiaoxue Jiang, Xiaojian Yu, Kambiz Moez, Duncan G. Elliott, Jie Chen

IEEE Trans. Circuits Syst. I Regul. Pap., 2018

Frequency Synthesis Based on A Novel Differential Locking Mechanism.

Jinghang Liang, Duncan G. Elliott

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2016

Stochastic Circuit Design and Performance Evaluation of Vector Quantization for Different Error Measures.

Ran Wang, Jie Han, Bruce F. Cockburn, Duncan G. Elliott

IEEE Trans. Very Large Scale Integr. Syst., 2016

Design, evaluation and fault-tolerance analysis of stochastic FIR filters.

Ran Wang, Jie Han, Bruce F. Cockburn, Duncan G. Elliott

Microelectron. Reliab., 2016

HV-CMOS single-chip electronics platform for lab-on-chip DNA analysis.

David L. Sloan, Benjamin Martin, Gordon Hall, Andrew Hakman, Philip A. Marshall, Stephane Martel, Christopher J. Backhouse, Vincent C. Gaudet, Duncan G. Elliott

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Coresidual alias-locked loops.

Jinghang Liang, Duncan G. Elliott

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015

Design and evaluation of stochastic FIR filters.

Ran Wang, Jie Han, Bruce F. Cockburn, Duncan G. Elliott

Proceedings of the IEEE Pacific Rim Conference on Communications, 2015

Stochastic circuit design and performance evaluation of vector quantization.

Ran Wang, Jie Han, Bruce F. Cockburn, Duncan G. Elliott

Proceedings of the 26th IEEE International Conference on Application-specific Systems, 2015

2013

A 6.0-13.5 GHz Alias-Locked Loop Frequency Synthesizer in 130 nm CMOS.

Jinghang Liang, Zhiyin Zhou, Jie Han, Duncan G. Elliott

IEEE Trans. Circuits Syst. I Regul. Pap., 2013

2012

Deeply Pipelined Digit-Serial LDPC Decoding.

Philip A. Marshall, Vincent C. Gaudet, Duncan G. Elliott

IEEE Trans. Circuits Syst. I Regul. Pap., 2012

Effects of Varying Message Precision in Digit-Online LDPC Decoders.

Philip A. Marshall, Vincent C. Gaudet, Duncan G. Elliott

Proceedings of the 2012 IEEE Workshop on Signal Processing Systems, 2012

Power Characterization of a Gbit/s FPGA Convolutional LDPC Decoder.

Si-Yun J. Li, Tyler L. Brandon, Duncan G. Elliott, Vincent C. Gaudet

Proceedings of the 2012 IEEE Workshop on Signal Processing Systems, 2012

2011

Design and Characterization of a Multilevel DRAM.

John C. Koob, Sue Ann Ung, Bruce F. Cockburn, Duncan G. Elliott

IEEE Trans. Very Large Scale Integr. Syst., 2011

2010

Jointly Designed Architecture-Aware LDPC Convolutional Codes and High-Throughput Parallel Encoders/Decoders.

Zhengang Chen, Tyler L. Brandon, Duncan G. Elliott, Stephen Bates, Witold A. Krzymien, Bruce F. Cockburn

IEEE Trans. Circuits Syst. I Regul. Pap., 2010

2009

A Compact 1.1-Gb/s Encoder and a Memory-Based 600-Mb/s Decoder for LDPC Convolutional Codes.

Tyler L. Brandon, John C. Koob, Leendert van den Berg, Zhengang Chen, Amirhossein Alimohammad, Ramkrishna Swamy, Jason Klaus, Stephen Bates, Vincent C. Gaudet, Bruce F. Cockburn, Duncan G. Elliott

IEEE Trans. Circuits Syst. I Regul. Pap., 2009

High-Voltage CMOS Controller for Microfluidics.

Maziyar Khorasani, Mohammad Behnam, Leendert van den Berg, Christopher J. Backhouse, Duncan G. Elliott

IEEE Trans. Biomed. Circuits Syst., 2009

2008

Efficient Implementation of Low-Density Parity-Check Convolutional Code Encoders With Built-In Termination.

Zhengang Chen, Tyler L. Brandon, Stephen Bates, Duncan G. Elliott, Bruce F. Cockburn

IEEE Trans. Circuits Syst. I Regul. Pap., 2008

A scalable LDPC decoder ASIC architecture with bit-serial message exchange.

Tyler L. Brandon, Robert Hang, Gary Block, Vincent C. Gaudet, Bruce F. Cockburn, Sheryl L. Howard, Christian Giasson, Keith Boyle, Paul Goud, Siavash Sheikh Zeinoddin, Anthony Rapley, Stephen Bates, Duncan G. Elliott, Christian Schlegel

Integr., 2008

Low-power static and dynamic high-voltage CMOS level-shifter circuits.

Maziyar Khorasani, Leendert van den Berg, Philip A. Marshall, Meysam Zargham, Vincent C. Gaudet, Duncan G. Elliott, Stephane Martel

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

A 600-Mb/s encoder and decoder for low-density parity-check convolutional codes.

Tyler L. Brandon, John C. Koob, Leendert van den Berg, Zhengang Chen, Amirhossein Alimohammad, Ramkrishna Swamy, Jason Klaus, Stephen Bates, Vincent C. Gaudet, Bruce F. Cockburn, Duncan G. Elliott

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

An alias-locked loop frequency synthesis architecture.

Leendert van den Berg, Duncan G. Elliott

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007

Clock-Logic Domino Circuits for High-Speed and Energy-Efficient Microprocessor Pipelines.

Raymond J. Sung, Duncan G. Elliott

IEEE Trans. Circuits Syst. II Express Briefs, 2007

Design and Test of a 175-Mb/s, Rate-1/2 (128, 3, 6) Low-Density Parity-Check Convolutional Code Encoder and Decoder.

Ramkrishna Swamy, Stephen Bates, Tyler L. Brandon, Bruce F. Cockburn, Duncan G. Elliott, John C. Koob, Zhengang Chen

IEEE J. Solid State Circuits, 2007

2006

Using Stacked Bitlines and Hybrid ROM Cells to Form ROM and SRAM-ROM With Increased Storage Density.

Tyler L. Brandon, Duncan G. Elliott, Bruce F. Cockburn

IEEE Trans. Circuits Syst. I Regul. Pap., 2006

Termination Sequence Generation Circuits for Low-Density Parity-Check Convolutional Codes.

Stephen Bates, Duncan G. Elliott, Ramkrishna Swamy

IEEE Trans. Circuits Syst. I Regul. Pap., 2006

Efficient Encoding and Termination of Low-Density Parity-Check Convolutional Codes.

Zhengang Chen, Stephen Bates, Duncan G. Elliott, Tyler L. Brandon

Proceedings of the Global Telecommunications Conference, 2006. GLOBECOM '06, San Francisco, CA, USA, 27 November, 2006

2005

Design of a 3-D fully depleted SOI computational RAM.

John C. Koob, Daniel A. Leder, Raymond J. Sung, Tyler L. Brandon, Duncan G. Elliott, Bruce F. Cockburn, Lisa G. McIlrath

IEEE Trans. Very Large Scale Integr. Syst., 2005

Test and Characterization of a Variable-Capacity Multilevel DRAM.

John C. Koob, Sue Ann Ung, Ashwin S. Rao, Daniel A. Leder, Craig S. Joly, Kristopher C. Breen, Tyler L. Brandon, Michael Hume, Bruce F. Cockburn, Duncan G. Elliott

Proceedings of the 23rd IEEE VLSI Test Symposium (VTS 2005), 2005

2003

Aliasing and anti-aliasing in branch history table prediction.

Kristopher C. Breen, Duncan G. Elliott

SIGARCH Comput. Archit. News, 2003

A Multilevel DRAM with Hierarchical Bitlines and Serial Sensing.

Bruce F. Cockburn, Jesús Hernández Tapia, Duncan G. Elliott

Proceedings of the 11th IEEE International Workshop on Memory Technology, 2003

An Efficient Functional Test for the Massively-Parallel C ?RAM Logic-Enhanced Memory Architecture.

Xiaoling Sun, Bruce F. Cockburn, Duncan G. Elliott

Proceedings of the 18th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2003), 2003

2002

Fault Modeling and Pattern-Sensitivity Testing for a Multilevel DRAM.

Michael Redeker, Bruce F. Cockburn, Duncan G. Elliott, Yunan Xiang, Sue Ann Ung

Proceedings of the 10th IEEE International Workshop on Memory Technology, 2002

An Investigation into Crosstalk Noise in DRAM Structures.

Michael Redeker, Bruce F. Cockburn, Duncan G. Elliott

Proceedings of the 10th IEEE International Workshop on Memory Technology, 2002

2001

Design of an Embedded Fully-Depleted SOI SRAM.

Raymond J. Sung, John C. Koob, Tyler L. Brandon, Duncan G. Elliott, Bruce F. Cockburn

Proceedings of the 9th IEEE International Workshop on Memory Technology, 2001

1999

Fault Models and Tests for a 2-Bit-per-Cell MLDRAM.

Michael Redeker, Bruce F. Cockburn, Duncan G. Elliott

IEEE Des. Test Comput., 1999

Computational RAM: Implementing Processors in Memory.

Duncan G. Elliott, Michael Stumm, W. Martin Snelgrove, Christian Cojocaru, Robert McKenzie

IEEE Des. Test Comput., 1999

A Comparative Simulation Study of Four Multilevel DRAMs.

Gershom Birk, Duncan G. Elliott, Bruce F. Cockburn

Proceedings of the 7th IEEE International Workshop on Memory Technology, 1999

Cost Models for Large File Memory DRAMs with ECC and Bad Block Marking.

C. Wickman, Duncan G. Elliott, Bruce F. Cockburn

Proceedings of the 14th International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT '99), 1999

Minimizing the effect of the host bus on the performance of a computational RAM logic-in-memory parallel-processing system.

Peter M. Nyasulu, Ralph Mason, W. Martin Snelgrove, Duncan G. Elliott

Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, 1999