Dror Lazar
According to our database1,
Dror Lazar
authored at least 6 papers
between 2008 and 2025.
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Bibliography
2025
IEEE J. Solid State Circuits, January, 2025
2024
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
Design of 224Gb/s DSP-Based Transceiver in CMOS Technology: Signal Integrity, Architecture, Circuits, and Packaging.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2024
2023
A 1.41-pJ/b 224-Gb/s PAM4 6-bit ADC-Based SerDes Receiver With Hybrid AFE Capable of Supporting Long Reach Channels.
IEEE J. Solid State Circuits, 2023
2022
Design Techniques of High Speed PHY using Highly compact FOVEROS Through Silicon Via.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
2008
An adaptive 4-tap analog FIR equalizer for 10-Gb/s over backplane serial link receiver.
Proceedings of the ESSCIRC 2008, 2008