Douglas C. Bossen

According to our database1, Douglas C. Bossen authored at least 14 papers between 1968 and 2002.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Awards

IEEE Fellow

IEEE Fellow 1985, "For contributions to error-correcting code applications to computers".

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2002
Power4 System Design for High Reliability.
IEEE Micro, 2002

Fault-tolerant design of the IBM pSeries 690 system using POWER4 processor technology.
IBM J. Res. Dev., 2002

1992
Fault-tolerance design of the IBM Enterprise System/9000 Type 9021 processors.
IBM J. Res. Dev., 1992

1984
Fault Alignment Exclusion for Memory Using Address Permutation.
IBM J. Res. Dev., 1984

1982
Model for Transient and Permanent Error-Detection and Fault-Isolation Coverage.
IBM J. Res. Dev., 1982

1980
A System Solution to the Memory Soft Error Problem.
IBM J. Res. Dev., 1980

1978
Measurement and Generation of Error Correcting Codes for Package Failures.
IEEE Trans. Computers, 1978

1975
On some properties of self-reciprocal polynomials (Corresp.).
IEEE Trans. Inf. Theory, 1975

Orthogonal Latin Square Configuration for LSI Memory Yield and Reliability Enhancement.
IEEE Trans. Computers, 1975

1974
Authors' Reply<sup>2</sup>.
IEEE Trans. Computers, 1974

1971
Cause-Effect Analysis for Multiple Fault Detection in Combinational Networks.
IEEE Trans. Computers, 1971

Minimum test patterns for residue networks.
Proceedings of the 8th Design Automation Workshop, 1971

1970
Optimum test patterns for parity networks.
Proceedings of the American Federation of Information Processing Societies: Proceedings of the AFIPS '70 Fall Joint Computer Conference, 1970

1968
Redundant Residue Polynomial Codes
Inf. Control., December, 1968


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