Douglas A. dos Santos

Orcid: 0000-0002-6502-4682

According to our database1, Douglas A. dos Santos authored at least 16 papers between 2019 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

2019
2020
2021
2022
2023
2024
2025
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2
3
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5
6
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5
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Legend:

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In proceedings 
Article 
PhD thesis 
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Other 

Links

On csauthors.net:

Bibliography

2025
Reliability Analysis of Baremetal and FreeRTOS Applications on Microchip PolarFire SoC RISC-V Multiprocessors Using High-Energy Protons.
IEEE Access, 2025

2024
Special Session: Reliability and Performance Evaluation of a RISC-V Vector Extension Unit for Vector Multiplication.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2024

Implementation and Reliability Evaluation of a ChaCha20 Stream Cipher Hardware Accelerator.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2024

Reliability Analysis of a Low-Cost CCSDS 123 Hyperspectral Image Compressor.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2024

2023
Using HARV-SoC for Reliable Sensing Applications in Radiation Harsh Environments.
Proceedings of the 9th International Workshop on Advances in Sensors and Interfaces, 2023

Characterization of a Fault-Tolerant RISC-V System-on-Chip for Space Environments.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2023

Hardening a Real-Time Operating System for a Dependable RISC-V System-on-Chip.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2023

Implementation and Reliability Evaluation of a RISC-V Vector Extension Unit.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2023

A Low-Cost Hardware Accelerator for CCSDS 123 Lossless Hyperspectral Image Compression.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2023

2022
A Survey of the RISC-V Architecture Software Support.
IEEE Access, 2022

Neutron Irradiation Testing and Analysis of a Fault-Tolerant RISC-V System-on-Chip.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2022

2021
Characterization of a RISC-V System-on-Chip under Neutron Radiation.
Proceedings of the 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2021

2020
A Low-Cost Fault-Tolerant RISC-V Processor for Space Systems.
Proceedings of the 15th Design & Technology of Integrated Systems in Nanoscale Era, 2020

2019
A Solution for Controlling and Managing User Profiles based on Data Privacy for IoT Applications.
CoRR, 2019

A Low-Cost Hardware Accelerator for CCSDS 123 Predictor in FPGA.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Characterization of a RISC-V Microcontroller Through Fault Injection.
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2019


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