Doug Malone

According to our database, Doug Malone authored at least 10 papers between 1999 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

IBM Telum: a 16-Core 5+ GHz DCM.

Ofer Geva, Christopher J. Berry, Robert J. Sonnelitter, David Wolpert, Adam Collura, Thomas Strach, Di Phan, Cédric Lichtenau, Alper Buyuktosunoglu, Hubert Harrer, Jeffrey A. Zitz, Chad Marquart, Douglas Malone, Tobias Webel, Adam Jatkowski, John Isakson, Dina Hamid, Mark Cichanowski, Michael Romain, Faisal Hasan, Kevin Williams, Jesse Surprise, Chris Cavitt, Mark Cohen

Proceedings of the IEEE International Solid-State Circuits Conference, 2022

2015

IBM z13 circuit design and methodology.

James D. Warnock, Christopher J. Berry, Michael H. Wood, Leon J. Sigal, Yun-Chan Myung, Guenter Mayer, Mark D. Mayo, Y. Chan, Frank Malgioglio, Gerald Strevig, Charudhattan Nagarajan, Sean M. Carey, Gerard Salem, Friedrich Schroeder, Howard H. Smith, Di Phan, Ricardo Nigaglioni, Thomas Strach, Matthew M. Ziegler, Niels Fricke, K. Lind, José Neves, Sridhar H. Rangarajan, J. P. Surprise, John Isakson, John Badar, Doug Malone, Donald W. Plass, A. Aipperspach, Dieter F. Wendel, Robert M. Averill III, Ruchir Puri

IBM J. Res. Dev., 2015

Resonant clock mega-mesh for the IBM z13^TM.

David Shan, Phillip J. Restle, Doug Malone, Robert A. Groves, Eric Lai, Michael Koch, Jason Hibbeler, Yong Kim, Christos Vezyrtzis, Jan Feder, David Hogenmiller, Thomas J. Bucelot

Proceedings of the Symposium on VLSI Circuits, 2015

4.1 22nm Next-generation IBM System z microprocessor.

James D. Warnock, Brian W. Curran, John Badar, Gregory Fredeman, Donald W. Plass, Yuen H. Chan, Sean M. Carey, Gerard Salem, Friedrich Schroeder, Frank Malgioglio, Guenter Mayer, Christopher J. Berry, Michael H. Wood, Yiu-Hing Chan, Mark D. Mayo, John Isakson, Charudhattan Nagarajan, Tobias Werner, Leon J. Sigal, Ricardo Nigaglioni, Mark Cichanowski, Jeffrey A. Zitz, Matthew M. Ziegler, Tim Bronson, Gerald Strevig, Daniel Dreps, Ruchir Puri, Douglas Malone, Dieter F. Wendel, Pak-kin Mak, Michael A. Blake

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2014

Circuit and Physical Design of the zEnterprise™ EC12 Microprocessor Chips and Multi-Chip Module.

James D. Warnock, Yuen H. Chan, Hubert Harrer, Sean M. Carey, Gerard Salem, Doug Malone, Ruchir Puri, Jeffrey A. Zitz, Adam Jatkowski, Gerald Strevig, Ayan Datta, Anne Gattiker, Aditya Bansal, Guenter Mayer, Yiu-Hing Chan, Mark D. Mayo, David L. Rude, Leon J. Sigal, Thomas Strach, Howard H. Smith, Huajun Wen, Pak-kin Mak, Chung-Lung Kevin Shum, Donald W. Plass, Charles F. Webb

IEEE J. Solid State Circuits, 2014

2013

5.5GHz system z microprocessor and multi-chip module.

James D. Warnock, Yuen H. Chan, Hubert Harrer, David L. Rude, Ruchir Puri, Sean M. Carey, Gerard Salem, Guenter Mayer, Yiu-Hing Chan, Mark D. Mayo, Adam Jatkowski, Gerald Strevig, Leon J. Sigal, Ayan Datta, Anne Gattiker, Aditya Bansal, Doug Malone, Thomas Strach, Huajun Wen, Pak-kin Mak, Chung-Lung Kevin Shum, Donald W. Plass, Charles F. Webb

Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2012

Circuit and Physical Design Implementation of the Microprocessor Chip for the zEnterprise System.

James D. Warnock, Yiu-Hing Chan, Sean M. Carey, Huajun Wen, Patrick J. Meaney, Guenter Gerwig, Howard H. Smith, Yuen H. Chan, John Davis, Paul Bunce, Antonio Pelella, Daniel Rodko, Pradip Patel, Thomas Strach, Doug Malone, Frank Malgioglio, José Neves, David L. Rude, William V. Huott

IEEE J. Solid State Circuits, 2012

2011

A 5.2GHz microprocessor chip for the IBM zEnterprise™ system.

James D. Warnock, Y. Chan, William V. Huott, Sean M. Carey, Michael F. Fee, Huajun Wen, Mary Jo Saccamango, Frank Malgioglio, Patrick J. Meaney, Donald W. Plass, Yuen H. Chan, Mark D. Mayo, Guenter Mayer, Leon J. Sigal, David L. Rude, Robert M. Averill III, Michael H. Wood, Thomas Strach, Howard H. Smith, Brian W. Curran, Eric M. Schwarz, Lee Eisen, Doug Malone, Steve Weitzel, Pak-kin Mak, Thomas J. McPherson, Charles F. Webb

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2000

Design validation of .18 μm 1 GHz cache and register arrays.

Doug Malone, Paul Bunce, Joe DellaPietro, John Davis, James Dawson, Thomas J. Knips, Don Plass, Phil Pritzlaff, Kenneth Reyer

Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000

1999

Design Validation of .18 um 1 Ghz Cache and Register Arrays.

Doug Malone

Proceedings of the 7th IEEE International Workshop on Memory Technology, 1999