Doron A. Peled

Orcid: 0000-0002-7280-6578

Affiliations:
  • Bar Ilan University, Department of Computer Science


According to our database1, Doron A. Peled authored at least 171 papers between 1987 and 2024.

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Bibliography

2024
Operational and Declarative Runtime Verification (Keynote).
Proceedings of the 7th ACM International Workshop on Verification and Monitoring at Runtime Execution, 2024

TP-DejaVu: Combining Operational and Declarative Runtime Verification.
Proceedings of the Verification, Model Checking, and Abstract Interpretation, 2024

2023
End-to-End AI Generated Runtime Verification from Natural Language Specification.
Proceedings of the Bridging the Gap Between AI and Reality, 2023

Integrating Distributed Component-Based Systems Through Deep Reinforcement Learning.
Proceedings of the Bridging the Gap Between AI and Reality, 2023


Accelerating Black Box Testing with Light-Weight Learning.
Proceedings of the Model Checking Software - 29th International Symposium, 2023

Runtime Verification Prediction for Traces with Data.
Proceedings of the Runtime Verification - 23rd International Conference, 2023

Monitorability for Runtime Verification.
Proceedings of the Runtime Verification - 23rd International Conference, 2023

A digital twin prototype for traffic sign recognition of a learning-enabled autonomous vehicle.
Proceedings of the Companion Proceedings of the 16th IFIP WG 8.1 Working Conference on the Practice of Enterprise Modeling and the 13th Enterprise Design and Engineering Working Conference: BES, DTE, FACETE, Tools & Demos, Forum, EDEN Doctoral Consortium co-located with PoEM 2023, Vienna, Austria, November 28, 2023

2022
On monitoring linear temporal properties.
Formal Methods Syst. Des., 2022

A Reinforcement-Learning Style Algorithm for Black Box Automata.
Proceedings of the 20th ACM-IEEE International Conference on Formal Methods and Models for System Design, 2022

Formal Specification for Learning-Enabled Autonomous Systems.
Proceedings of the Software Verification and Formal Methods for ML-Enabled Autonomous Systems, 2022

2021
An extension of first-order LTL with rules with application to runtime verification.
Int. J. Softw. Tools Technol. Transf., 2021

Monitoring First-Order Interval Logic.
Proceedings of the Software Engineering and Formal Methods - 19th International Conference, 2021

Reverse Engineering Through Automata Learning.
Proceedings of the Formal Methods in Outer Space, 2021

2020
First-order temporal logic monitoring with BDDs.
Formal Methods Syst. Des., 2020

BDDs for Representing Data in Runtime Verification.
Proceedings of the Runtime Verification - 20th International Conference, 2020

Synthesizing Control for a System with Black Box Environment, Based on Deep Learning.
Proceedings of the Leveraging Applications of Formal Methods, Verification and Validation: Engineering Principles, 2020

First-Order Timed Runtime Verification Using BDDs.
Proceedings of the Automated Technology for Verification and Analysis, 2020

2019
An Extension of LTL with Rules and Its Application to Runtime Verification.
Proceedings of the Runtime Verification - 19th International Conference, 2019

Control Synthesis Through Deep Learning.
Proceedings of the From Reactive Systems to Cyber-Physical Systems, 2019

Formal Methods.
Proceedings of the Handbook of Software Engineering., 2019

2018
Partial-Order Reduction.
Proceedings of the Handbook of Model Checking., 2018

Efficient Runtime Verification of First-Order Temporal Properties.
Proceedings of the Model Checking Software - 25th International Symposium, 2018

Genetic Synthesis of Concurrent Code Using Model Checking and Statistical Model Checking.
Proceedings of the Model Checking Software - 25th International Symposium, 2018

Runtime Verification: From Propositional to First-Order Temporal Logic.
Proceedings of the Runtime Verification - 18th International Conference, 2018

BDDs on the Run.
Proceedings of the Leveraging Applications of Formal Methods, Verification and Validation. Industrial Practice, 2018

Chasing Errors Using Biasing Automata.
Proceedings of the Leveraging Applications of Formal Methods, Verification and Validation. Verification, 2018

DejaVu: A Monitoring Tool for First-Order Temporal Logic.
Proceedings of the 3rd Workshop on Monitoring and Testing of Cyber-Physical Systems, 2018

Refining the Safety-Liveness Classification of Temporal Properties According to Monitorability.
Proceedings of the Models, Mindsets, 2018

Model checking, 2nd Edition.
MIT Press, ISBN: 978-0-262-03883-6, 2018

2017
Automata Based Validation Techniques.
Proceedings of the Dependable Software Systems Engineering, 2017

Synthesizing, correcting and improving code, using model checking-based genetic programming.
Int. J. Softw. Tools Technol. Transf., 2017

Memory-Efficient Tactics for Randomized LTL Model Checking.
Proceedings of the Verified Software. Theories, Tools, and Experiments, 2017

2016
A Game-Theoretic Foundation for the Maximum Software Resilience against Dense Errors.
IEEE Trans. Software Eng., 2016

Using Genetic Programming for Software Reliability.
Proceedings of the Runtime Verification - 16th International Conference, 2016

Automatic Synthesis of Code Using Genetic Programming.
Proceedings of the Leveraging Applications of Formal Methods, Verification and Validation: Foundational Techniques, 2016

2015
From Verification to Synthesis.
Proceedings of the Dependable Software Systems Engineering, 2015

Synthesis of succinct systems.
J. Comput. Syst. Sci., 2015

Local and global fairness in concurrent systems.
Proceedings of the 13. ACM/IEEE International Conference on Formal Methods and Models for Codesign, 2015

Knowledge = Observation + Memory + Computation.
Proceedings of the Foundations of Software Science and Computation Structures, 2015

2014
Editorial: special issue on synthesis.
Acta Informatica, 2014

Monitoring Parametric Temporal Logic.
Proceedings of the Verification, Model Checking, and Abstract Interpretation, 2014

Using Statistical Model Checking for Measuring Systems.
Proceedings of the Leveraging Applications of Formal Methods, Verification and Validation. Specialized Techniques and Applications, 2014

Compositional Branching-Time Measurements.
Proceedings of the From Programs to Systems. The Systems perspective in Computing, 2014

Distributed Control Synthesis.
Proceedings of the HOWARD-60: A Festschrift on the Occasion of Howard Barringer's 60th Birthday, 2014

2013
Model Checking Basics.
Proceedings of the Engineering Dependable Software Systems, 2013

Synthesis of Parametric Programs using Genetic Programming and Model Checking.
Proceedings of the Proceedings 15th International Workshop on Verification of Infinite-State Systems, 2013

Synthesizing distributed scheduling implementation for probabilistic component-based systems.
Proceedings of the 11th ACM/IEEE International Conference on Formal Methods and Models for Codesign, 2013

Performance Evaluation of Process Partitioning Using Probabilistic Model Checking.
Proceedings of the Hardware and Software: Verification and Testing, 2013

Taming Confusion for Modeling and Implementing Probabilistic Concurrent Systems.
Proceedings of the Programming Languages and Systems, 2013

2012
Achieving distributed control through model checking.
Formal Methods Syst. Des., 2012

Rapid Recovery for Systems with Scarce Faults
Proceedings of the Proceedings Third International Symposium on Games, 2012

Knowledge Based Transactional Behavior.
Proceedings of the Hardware and Software: Verification and Testing, 2012

2011
Model Checking.
Proceedings of the Software and Systems Safety - Specification and Verification, 2011

Priority scheduling of distributed systems based on model checking.
Formal Methods Syst. Des., 2011

Practical Distributed Control Synthesis
Proceedings of the Proceedings 13th International Workshop on Verification of Infinite-State Systems, 2011

Efficient deadlock detection for concurrent systems.
Proceedings of the 9th IEEE/ACM International Conference on Formal Methods and Models for Codesign, 2011

Monitoring Distributed Systems Using Knowledge.
Proceedings of the Formal Techniques for Distributed Systems, 2011

Synthesis of Distributed Control through Knowledge Accumulation.
Proceedings of the Computer Aided Verification - 23rd International Conference, 2011

The Buck Stops Here: Order, Chance, and Coordination in Distributed Control.
Proceedings of the Automated Technology for Verification and Analysis, 2011

2010
Quantifying the Discord: Order Discrepancies in Message Sequence Charts.
Int. J. Found. Comput. Sci., 2010

Code Mutation in Verification and Automatic Code Correction.
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2010

Knowledge Based Scheduling of Distributed Systems.
Proceedings of the Time for Verification, 2010

MCGP: A Software Synthesis Tool Based on Model Checking and Genetic Programming.
Proceedings of the Automated Technology for Verification and Analysis, 2010

Methods for Knowledge Based Controlling of Distributed Systems.
Proceedings of the Automated Technology for Verification and Analysis, 2010

2009
Efficient model checking for LTL with partial order snapshots.
Theor. Comput. Sci., 2009

On commutativity based Edge Lean search.
Ann. Math. Artif. Intell., 2009

Synthesizing Solutions to the Leader Election Problem Using Model Checking and Genetic Programming.
Proceedings of the Hardware and Software: Verification and Testing, 2009

2008
Model Checking.
Proceedings of the Wiley Encyclopedia of Computer Science and Engineering, 2008

Automatic generation of path conditions for concurrent timed systems.
Theor. Comput. Sci., 2008

Model Checking-Based Genetic Programming with an Application to Mutual Exclusion.
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2008

Model Checking Driven Heuristic Search for Correct Programs.
Proceedings of the Model Checking and Artificial Intelligence, 5th International Workshop, 2008

Discriminative Model Checking.
Proceedings of the Computer Aided Verification, 20th International Conference, 2008

Genetic Programming and Model Checking: Synthesizing New Mutual Exclusion Algorithms.
Proceedings of the Automated Technology for Verification and Analysis, 2008

2007
Preface.
Int. J. Found. Comput. Sci., 2007

Detecting Races in Ensembles of Message Sequence Charts.
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2007

Test Case Generation for Ultimately Periodic Paths.
Proceedings of the Hardware and Software: Verification and Testing, 2007

07241 Abstracts Collection - Tools for the Model-based Development of Certifiable, Dependable Systems.
Proceedings of the Tools for the Model-based Development of Certifiable, Dependable Systems, 10.06., 2007

07241 Summary - Tools for the Model-based Development of Certifiable, Dependable Systems.
Proceedings of the Tools for the Model-based Development of Certifiable, Dependable Systems, 10.06., 2007

2006
Enforcing Concurrent Temporal Behaviors.
Int. J. Found. Comput. Sci., 2006

Adaptive Model Checking.
Log. J. IGPL, 2006

Grey-Box Checking.
Proceedings of the Formal Techniques for Networked and Distributed Systems, 2006

2005
Introduction: Special Issue on Partial Order in Formal Methods.
Formal Methods Syst. Des., 2005

Deciding Global Partial-Order Properties.
Formal Methods Syst. Des., 2005

Model checking, testing and verification working together.
Formal Aspects Comput., 2005

Automatic Test Generation and Monitoring of Infinite States Systems.
Proceedings of the Verification of Infinite-State Systems with Applications to Security, 2005

Snapshot Verification.
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2005

Generating Path Conditions for Timed Systems.
Proceedings of the Integrated Formal Methods, 5th International Conference, 2005

Time Unbalanced Partial Order.
Proceedings of the Formal Approaches to Software Testing, 5th International Workshop, 2005

Calculating Probabilities of Real-Time Test Cases.
Proceedings of the Formal Approaches to Software Testing, 5th International Workshop, 2005

2004
Automatic Generation of Path Conditions for Timed Systems.
Proceedings of the International Symposium on Leveraging Applications of Formal Methods, 2004

Specifying and Verifying Partial Order Properties Using Template MSCs.
Proceedings of the Foundations of Software Science and Computation Structures, 2004

2003
Compositional message sequence charts.
Int. J. Softw. Tools Technol. Transf., 2003

Model Checking and Testing Combined.
Proceedings of the Automata, Languages and Programming, 30th International Colloquium, 2003

Automatic Verification of Annotated Code.
Proceedings of the Formal Techniques for Networked and Distributed Systems - FORTE 2003, 23rd IFIP WG 6.1 International Conference, Berlin, Germany, September 29, 2003

Deciding Properties of Message Sequence Charts.
Proceedings of the Scenarios: Models, 2003

Unit Checking: Symbolic Model Checking for a Unit of Code.
Proceedings of the Verification: Theory and Practice, 2003

Message Sequence Charts.
Proceedings of the Lectures on Concurrency and Petri Nets, 2003

2002
Black Box Checking.
J. Autom. Lang. Comb., 2002

Combining Software and Hardware Verification Techniques.
Formal Methods Syst. Des., 2002

Specification and Verification using Message Sequence Charts.
Proceedings of the Validation and Implementation of Scenario-based Specifications, 2002

Tracing the executions of concurrent programs.
Proceedings of the Runtime Verification 2002, 2002

Temporal Debugging for Concurrent Systems.
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2002

Comparing Symbolic and Explicit Model Checking of a Software System.
Proceedings of the Model Checking of Software, 2002

AMC: An Adaptive Model Checker.
Proceedings of the Computer Aided Verification, 14th International Conference, 2002

2001
Parametric temporal logic for "model measuring".
ACM Trans. Comput. Log., 2001

Relaxed Visibility Enhances Partial Order Reduction.
Formal Methods Syst. Des., 2001

From Model Checking to a Temporal Proof.
Proceedings of the Model Checking Software, 2001

From Finite State Communication Protocols to High-Level Message Sequence Charts.
Proceedings of the Automata, Languages and Programming, 28th International Colloquium, 2001

From Falsification to Verification.
Proceedings of the FST TCS 2001: Foundations of Software Technology and Theoretical Computer Science, 2001

A Combined Testing and Verification Approach for Software Reliability.
Proceedings of the FME 2001: Formal Methods for Increasing Software Productivity, 2001

Software Reliability Methods.
Texts in Computer Science, Springer, ISBN: 978-1-4419-2876-4, 2001

Model checking, 1st Edition.
MIT Press, ISBN: 978-0-262-03270-4, 2001

2000
Model-Checking of Correctness Conditions for Concurrent Objects.
Inf. Comput., 2000

Analyzing Message Sequence Charts.
Proceedings of the SAM 2000, 2000

Using a Mix of Languages in Formal Methods: The PET System.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2000

Formal Methods for Message Sequence Charts.
Proceedings of the 2000 ICDCS Workshops, April 10, 2000, Taipei, Taiwan, ROC, 2000

Specification and Verification of Message Sequence Charts.
Proceedings of the Formal Techniques for Distributed System Development, 2000

PET: An Interactive Software Testing Tool.
Proceedings of the Computer Aided Verification, 12th International Conference, 2000

1999
State Space Reduction Using Partial Order Techniques.
Int. J. Softw. Tools Technol. Transf., 1999

Formal Verification of a Partial-Order Reduction Technique for Model Checking.
J. Autom. Reason., 1999

Undecidability of Partial Order Logics.
Inf. Process. Lett., 1999

A Partial Order Approach to Branching Time Logic Model Checking.
Inf. Comput., 1999

Path Exploration Tool.
Proceedings of the Tools and Algorithms for Construction and Analysis of Systems, 1999

Generalized Stuttering Equivalence.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1999

Message Sequence Graphs and Decision Problems on Mazurkiewicz Traces.
Proceedings of the Mathematical Foundations of Computer Science 1999, 1999

Hazard-Freedom Checking in Speed-Independent Systems.
Proceedings of the Correct Hardware Design and Verification Methods, 1999

1998
An Algorithmic Approach for Checking Closure Properties of Temporal Logic Specifications and Omega-Regular Languages.
Theor. Comput. Sci., 1998

Adding Partial Orders to Linear Temporal Logic.
Fundam. Informaticae, 1998

Static Partial Order Reduction.
Proceedings of the Tools and Algorithms for Construction and Analysis of Systems, 1998

Deciding Properties for Message Sequence Charts.
Proceedings of the Foundations of Software Science and Computation Structure, 1998

A Toolset for Message Sequence Charts.
Proceedings of the Computer Aided Verification, 10th International Conference, 1998

Ten Years of Partial Order Reduction.
Proceedings of the Computer Aided Verification, 10th International Conference, 1998

A General Approach to Partial Order Reductions in Symbolic Verification (Extended Abstract).
Proceedings of the Computer Aided Verification, 10th International Conference, 1998

1997
On Projective and Separable Properties.
Theor. Comput. Sci., 1997

Stutter-Invariant Temporal Properties are Expressible Without the Next-Time Operator.
Inf. Process. Lett., 1997

Design tools for requirements engineering.
Bell Labs Tech. J., 1997

Verification for Robust Specification.
Proceedings of the Theorem Proving in Higher Order Logics, 10th International Conference, 1997

Verification of Message Sequence Charts via Template Matching.
Proceedings of the TAPSOFT'97: Theory and Practice of Software Development, 1997

Combining Partial Order and Symmetry Reductions.
Proceedings of the Tools and Algorithms for Construction and Analysis of Systems, 1997

Verifying hardware in its software context.
Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997

An Improved Search Strategy for Lossy Channel Systems.
Proceedings of the Formal Description Techniques and Protocol Specification, 1997

1996
Using Partial-Order Methods in the Formal Validation of Industrial Concurrent Programs.
IEEE Trans. Software Eng., 1996

An Analyzer for Message Sequence Charts.
Softw. Concepts Tools, 1996

Combining Partial Order Reductions with On-the-Fly Model-Checking.
Formal Methods Syst. Des., 1996

User Interfaces for Formal Methods.
ACM Comput. Surv., 1996

An Analyser for Mesage Sequence Charts.
Proceedings of the Tools and Algorithms for Construction and Analysis of Systems, 1996

Partial Order Reduction: Model-Checking Using Representatives.
Proceedings of the Mathematical Foundations of Computer Science 1996, 1996

Partial order reduction: Linear and branching temporal logics and process algebras.
Proceedings of the Partial Order Methods in Verification, Proceedings of a DIMACS Workshop, 1996

On nested depth first search.
Proceedings of the Spin Verification System, 1996

Preface.
Proceedings of the Spin Verification System, 1996

An Algorithmic Approach for Checking Closure Properties of omega-Regular Languages.
Proceedings of the CONCUR '96, 1996

The State of SPIN.
Proceedings of the Computer Aided Verification, 8th International Conference, 1996

1995
Using asynchronous Büchi automata for efficient automatic verification of concurrent systems.
Proceedings of the Protocol Specification, 1995

Simple on-the-fly automatic verification of linear temporal logic.
Proceedings of the Protocol Specification, 1995

Model-Checking of Causality Properties
Proceedings of the Proceedings, 1995

1994
Proving Partial Order Properties.
Theor. Comput. Sci., 1994

A Compositional Framework for Fault Tolerance by Specification Transformation.
Theor. Comput. Sci., 1994

A Hierarchy of Partial Order Temporal Properties.
Proceedings of the Temporal Logic, First International Conference, 1994

An improvement in formal verification.
Proceedings of the Formal Description Techniques VII, 1994

1993
A Compositional Approach for Fault-Tolerance Using Specification Transformation.
Proceedings of the PARLE '93, 1993

All from One, One for All: on Model Checking Using Representatives.
Proceedings of the Computer Aided Verification, 5th International Conference, 1993

1992
Defining Conditional Independence Using Collapses.
Theor. Comput. Sci., 1992

Verification of Distributed Programs Using Representative Interleaving Sequences.
Distributed Comput., 1992

Sometimes 'Some' is as Good as 'All'.
Proceedings of the CONCUR '92, 1992

1991
Specifying and Proving Serializability in Temporal Logic
Proceedings of the Sixth Annual Symposium on Logic in Computer Science (LICS '91), 1991

1990
Interleaving Set Temporal Logic.
Theor. Comput. Sci., 1990

Proving Partial Order Liveness Properties.
Proceedings of the Automata, Languages and Programming, 17th International Colloquium, 1990

1988
An efficient verification method for parallel and distributed programs.
Proceedings of the Linear Time, Branching Time and Partial Order in Logics and Models for Concurrency, School/Workshop, Noordwijkerhout, The Netherlands, May 30, 1988

1987
Interleaving Set Temporal Logic (Preliminary Version).
Proceedings of the Sixth Annual ACM Symposium on Principles of Distributed Computing, 1987


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